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Tonal Noise
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JovianPyx



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PostPosted: Sat Feb 19, 2011 8:33 am    Post subject: Tonal Noise
Subject description: My research into digital physcally modelling an analog noise patch
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This is some blah blah regarding the last few days I've spent researching how to implement tonal noise using digital methods.

I've done tonal noise digitally by modulating the pitch input of an NCO with noise. This works, but didn't give me the noise character I wanted. Among the issues with it's implementation is that a digital synth works very much like a linear pitch VCO internally. This causes the modulation effect to be greater for lower pitches than it is for higher ones. This is because the difference between the values that move one semi tone are greater for higher pitches than for lower. If the modulation signal is not increased for higher pitches, then the noise effect is lost as pitch is increased. I compensated for this by using the note number to increase the amount of modulation as pitch (note number) is increased. This sounds good, but didn't really sound like what I wanted. It has the advantage of allowing different waveforms to be used in the NCO which "colors" the character of the sound.

This particular project is different than the one I described above. Another method to make tonal noise is to (basically) send noise into a tunable bandpass filter with high Q capacity and use the Fc input to control the pitch. In this project, I used a state variable filter because it is easy to tune and easy to set Q. However, a state variable filter presents some challenges. First is what is known as "Q enhancement". Q enhancement is the property of this (and others) type of filter that causes apparent Q to increase as Fc increases. The problem here is that an input of constant amplitude will eventually cause instability in the filter as Fc is increased (assuming a constant Q greater than 1). I handled this by what I call Q compensation which amounts to using the Fc signal to decrease Q as Fc increases. This works to quell the instability, but the system still presents an amplitude "enhancement" that causes the output to increase as Fc increases. I designed a simple amplitude compensator using the MIDI note number as it's input and decreasing the amplitude as note number (and hence Fc) increases.

I've included the block diagram of the system for your perusal and later today or tomorrow I will try to post some sound.

Note that in the block diagram, signal Q is not present - rather, a signal called "q" is which represents 1/Q.


tonal_noise_monosynth_block_diagram.gif
 Description:
Block Diagram of Tonal Noise Monosynth Sound Generation Hardware
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tonal_noise_monosynth_block_diagram.gif



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JovianPyx



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PostPosted: Sat Feb 19, 2011 7:12 pm    Post subject: Reply with quote  Mark this post and the followings unread

Some sound. This piece uses two synths set up as tonal noise synths (as well as three other FPGA synths). I can hear that I need to reduce the amount of noise in my noise synth cyclops ... I'm thinking of running two bandpass SVFs using the same Fc, but one using a Q of 1.0 to reduce the shhhhhh effect.


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72

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Last edited by JovianPyx on Mon Feb 21, 2011 12:15 pm; edited 2 times in total
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PostPosted: Mon Feb 21, 2011 12:11 pm    Post subject: Reply with quote  Mark this post and the followings unread

See the second block diagram image for the new and improved synth. I've added another bandpass SVF between the white noise source and the level multiplier. This essentially creates a 4 pole filter and provides for a much deeper out of band attenuation of the noise signal. I now get a much cleaner tonal noise, somewhat reminiscent of an airy flute or whistle.

I am now working to regenerate the sound file using the new version of this monosynth and I will leave the first one here for comparison. It should be posted later today.


tonal_noise_monosynth_block_diagram.gif
 Description:
Updated Block Diagram of Digital Tonal Noise Monosynth
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Last edited by JovianPyx on Mon Feb 28, 2011 4:46 pm; edited 8 times in total
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PostPosted: Mon Feb 21, 2011 1:03 pm    Post subject: Reply with quote  Mark this post and the followings unread

Same sequence (slightly different mix) using the updated synth.


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Second Shot

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PostPosted: Mon Feb 21, 2011 1:24 pm    Post subject: Reply with quote  Mark this post and the followings unread

In case anyone is wondering - this is implemented on an FPGA...
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PostPosted: Mon Feb 21, 2011 2:28 pm    Post subject: Reply with quote  Mark this post and the followings unread

Sounding good. Very nice demo btw.
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PostPosted: Mon Feb 21, 2011 8:52 pm    Post subject: Reply with quote  Mark this post and the followings unread

Thank you Ian.

After getting the synth to work properly, I did a more polished version posted here. I did more with the "harp" part and tweaked other stuff. Pardon the noisey studio...


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Finished Piece

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PostPosted: Sat Feb 26, 2011 4:11 pm    Post subject: Reply with quote  Mark this post and the followings unread

This is sounding great ! Glad I popped over to check this out. The pitched noise has a pleasing character.

Brilliant !

Bill
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PostPosted: Sat Feb 26, 2011 4:45 pm    Post subject: Reply with quote  Mark this post and the followings unread

Thanks Bill!

This is where the quest for tonal noise took me. It required wide arithmetic data paths and high sample rate. SR=800 kHz and data paths are 35 bits wide. The filters' delay cells are 70 bits wide. I think my quest is now over. I was hoping to cram two of these into one FPGA, but the FPGAs I have are a little too small, this design takes about 57% of the real estate.

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PostPosted: Sat Feb 26, 2011 5:45 pm    Post subject: Reply with quote  Mark this post and the followings unread

OMFG Scott! That which comes out of your mind, has blown me away in the past but with that - somewhat understanding the description, I am almost speechless. Surprised

And the tonal noise build? salut

All I can say essentially is, wow. Surprised Well, done!

Can't help it but ... here, I'm hoping that I've gotten my first PIC programmed properly for a VCLFO, barely yet understanding the code that I received clearance from it's writer, for using. Haha. Not even worth a comparison but it's as far as I've gotten ... down this 'path'. Smile Back to analog where I'm much more comfy in designing. Very Happy
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PostPosted: Sat Feb 26, 2011 6:39 pm    Post subject: Reply with quote  Mark this post and the followings unread

Rykhaard wrote:
OMFG Scott! That which comes out of your mind, has blown me away in the past but with that - somewhat understanding the description, I am almost speechless. Surprised


:blush: -> colors

Rykhaard wrote:
And the tonal noise build? salut


This is "just" a digital model of an analog patch really. I first heard it on the album "Switched On Bach" by Walter (at the time) Carlos. Eventually, I read about several ways this might be done and I "copied" a couple of them, settling on this one as the best. What I found was that it's a lot easier to do this in analog, especially with expo pitch CV.

Rykhaard wrote:
All I can say essentially is, wow. Surprised Well, done!

Can't help it but ... here, I'm hoping that I've gotten my first PIC programmed properly for a VCLFO, barely yet understanding the code that I received clearance from it's writer, for using. Haha. Not even worth a comparison but it's as far as I've gotten ... down this 'path'. Smile Back to analog where I'm much more comfy in designing. Very Happy


You're doing fine my man. Just never stop. PIC programming is not a lightweight thing in my opinion. You have to know what you're doing with all the weirdness you have to deal with. Good ICs, but weird. I've got 10 dsPICs here. I just need to settle on a project and dive in... I'll be using a schematic I got from Tom Wiltshire and modify it a bit. I can do the programming, but I just hope I don't blow it up by DIY madness... The code for that VCLFO is a good project to look at the code to learn how it works.

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PostPosted: Sun Feb 27, 2011 7:29 am    Post subject: Reply with quote  Mark this post and the followings unread

Quote:
This is where the quest for tonal noise took me. It required wide arithmetic data paths and high sample rate. SR=800 kHz and data paths are 35 bits wide. The filters' delay cells are 70 bits wide. I think my quest is now over. I was hoping to cram two of these into one FPGA, but the FPGAs I have are a little too small, this design takes about 57% of the real estate.


Curious to which development board you used Scott? I really like the way you normalized the gain and q factors over the band. That second SVF really knocks the unwanted noise down ! This is cool and sounds sweet.

Bill
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PostPosted: Sun Feb 27, 2011 8:30 am    Post subject: Reply with quote  Mark this post and the followings unread

It runs on a Spartan-3E Starter Kit - and it's output is coming from the onboard 12 bit DAC.

The normalization isn't perfect, but it helps quite a bit. I may still mess with it by using methods other than simple linear compensation, especially for amplitude.

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PostPosted: Sun Feb 27, 2011 8:31 am    Post subject: Reply with quote  Mark this post and the followings unread

JovianPyx wrote:
Rykhaard wrote:
OMFG Scott! That which comes out of your mind, has blown me away in the past but with that - somewhat understanding the description, I am almost speechless. Surprised


:blush: -> colors

Rykhaard wrote:
And the tonal noise build? salut


This is "just" a digital model of an analog patch really. I first heard it on the album "Switched On Bach" by Walter (at the time) Carlos. Eventually, I read about several ways this might be done and I "copied" a couple of them, settling on this one as the best. What I found was that it's a lot easier to do this in analog, especially with expo pitch CV.


Oh ho ho! Surprised I haven't heard that album for years. It disappeared with the rest of my collection, at my friend's place of storage a few years ago. Sad I'll have to go searching for it again. That, is something really cool that Wendalter had done, back THEN. Surprised


Quote:

You're doing fine my man. Just never stop. PIC programming is not a lightweight thing in my opinion. You have to know what you're doing with all the weirdness you have to deal with. Good ICs, but weird. I've got 10 dsPICs here. I just need to settle on a project and dive in... I'll be using a schematic I got from Tom Wiltshire and modify it a bit. I can do the programming, but I just hope I don't blow it up by DIY madness... The code for that VCLFO is a good project to look at the code to learn how it works.


Tom's! Yes! Thank you. Smile I couldn't remember whose it were, as I'd been working on it last Summer and had shifted attentions a couple of times since. (Back to building, strong and steady though, since Hexinverter asked for permission to redo the Liquid HiHat. (V1.1/V3.00 is almost ready. My beta of 3.00 is working beautifully.)

Aye. Programming wise - I almost completely understand the workings in the assembly language area. All I need to do, is continue to learn working with it and it'll be no problem. Smile It's the start though ... main thing to do now, is to build it's support PCB and it should be ok. Then, once I start learning it more, I can then start modifying it, as I usually do with everything else. Smile

Where you've gone though sir - salut Much respect for all of your work there.
Inspiration as well, to look at the tonal noise works, but, in the analog area. I'm quite impressed with it sonically. Smile
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JovianPyx



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PostPosted: Sun Feb 27, 2011 9:53 am    Post subject: Reply with quote  Mark this post and the followings unread

I should mention that the reason for using the Spartan-3E Starter Kit board was precisely because of the 12 bit DAC - which is capable of sample rates up to 1.0 MHz. In fact, I tried to get it to work at 1.0 MHz, but the combinatorial 35x35=70 multipliers won't clock at the 50 MHz required to get a sample rate of 1.0 MHz. Dropping the system clock from 50 MHz to 40 MHz with a DCM works for the multipliers and allows a max sample rate of 800 kHz.

The high sample rate enhances the quality of the LFSR noise. An LFSR has a spectrum that looks like a comb with the teeth moving closer together as the LFSR is made longer (hence I used a 64 bit shift register) and the spectrum has better high frequency content at higher sample rates. You can hear the effect of sample rate if you've ever run one from a VCO as the clock and sweep it. As you increase the clock, you can hear more and more high frequency content. I suppose one could say that the noise output gets whiter sounding as the sample rate increases.

The high sample rate also benefits the SVFs since they don't work well at Fc above 1/6 of the sample rate. 800 kHz gives a serious amount of headroom where 1/6 is 133.3333 kHz. I wanted a noise stream that sounds as much like analog as possible. My ears can't tell the difference.

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PostPosted: Sun Feb 27, 2011 12:41 pm    Post subject: Reply with quote  Mark this post and the followings unread

Scott, First and foremost, your work on this and your other digital synths is just wonderful! One of the things I was wondering is: if you settle on a final design for a digital synth, is it easy to scale down to build something a little more economical?

Where I'm coming from is that the Spartan-3E Starter Kit sells for like $300. I'm guessing there is a number of functions on that board that aren't necessary for a typical digital synth and that a smaller version board could be realized? I guess for $300, I could put together a minimal pc running a VST.

Don't get me wrong, I mean no disrespect. I'm just trying to get my hands around the economics of DIY hardware digital synths. OTOH, I may just be missing the whole point. I've certainly spent more money on DIY projects that I could have bought commercially for cheaper.

I realize this is a little off topic and will keep any further comments to a minimum. Thanks again!

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PostPosted: Sun Feb 27, 2011 1:13 pm    Post subject: Reply with quote  Mark this post and the followings unread

wow, I got my S-3E starter kit boards for $150, though I have no idea if that's any less painful... I got a barely ever used one from another person for $80.

And yes, there is stuff on the board that I won't ever use - ethernet for one. And I've not been brave enough to attempt a design that uses the DDR SDRAM - but someday...

It might work in a smaller Spartan-3E or Spartan-3A, the design uses 57% of the slices in a 500K gate device. It might fit into a 400K gate device such as is on the little Avnet Spartan-3A eval board (which I purchased for $49, but I know it's more than that now).

Your point is well taken regarding cost, it might be interesting to cram this into a dsPIC, a bit of a challenge though, since the internal DAC supports a max sample rate of 100 kHz. I use these FPGAs because I find them to be both big and fast. I haven't tested the FPGA design at lower sample rates, so I don't (yet) know if 100 kHz is too low. At that sample rate, Fc for the SVFs should go no higher than 16.66667 kHz which is plenty for musical tones. At that sample rate, the loop would have to be less than 400 instructions long - I've not yet attempted to program a dsPIC, so I don't know if that's unreasonably small or not. Another problem with lower sample rates is that the relationship between Fc and the actual pitch of the instrument becomes less linear as sample rate is decreased - though I don't (yet) know if that's a problem or not.

So a first proof-of-concept test would be to lower the sample rate to 100 kHz and give it a listen.

Then would be the task of programming the synth AND a MIDI controller into the dsPIC. Although, using a second PIC for a MIDI controller is not out of the question, but if in the dsPIC with the synth, I'd probably have to write a very minimal MIDI controller.

The design could probably be trimmed a bit. Eg., I think the lowpass SVF is superfluous, it doesn't have much effect at all on the sound. But the rest I'd like to keep, portamento and the compensation stuff.

Since I'm looking for a first-time useful project for dsPIC, this seems like a good one. That would make it very economical and it would be an instant on device.

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PostPosted: Sun Feb 27, 2011 6:44 pm    Post subject: Reply with quote  Mark this post and the followings unread

Scott

I see the the MIDI note number is used for amplitude compensation but is the PITCH, controlling Fc of the second SVF, derived from the note number also?

Oh BTW, for Dan Lavin, here is a good place to get your boards. This is where I got my Spartan 3E development board. The price has gone up a tad sine I got mine.

http://www.digilentinc.com/Products/Detail.cfm?NavPath=2,400,792&Prod=S3EBOARD

Bill
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PostPosted: Sun Feb 27, 2011 7:05 pm    Post subject: Reply with quote  Mark this post and the followings unread

Yes, the MIDI note number supplies pitch by addressing the tuning ROM, the data from which is used to generate Fc. The tuning ROM raw output delivers a pitch higher than standard (A440 tuning) so I multiply the ROM values by a tuning factor between 1.0 and 0.0 to get tuning to match other instruments. The tuning multiplier value is supplied by sysex from (in my case) a VB.NET program.

Also, the pitch value is sent to both the first and second SVF Fc input. The first has a constant Q of 0.9999999, the second has a Q that can be adjusted and would normally be rather high. In the demo piece it was set to 2000. So the first SVF doesn't really give perceivably pitched noise, but it does narrow the bandwidth of the noise on either side of Fc. The second high Q SVF is the one that actually makes the noise pitched. The first one serves to prevent a serious SHHHH sound by rolling off the noise near Fc. The two SVFs together basically form a 4 pole bandpass filter. I thought about two different scenarios for the bandpass filters - 1) the way I did it and 2) put the same q and Fc signals into both filters. I have not tried #2 yet, but I was afraid that it would give too much of a sinusoidal sound and I wanted an obvious pitched noise. And now that I look at what I wrote, I realize that the best solution would be to allow adjustable Q on both filters...

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PostPosted: Sun Feb 27, 2011 7:21 pm    Post subject: Reply with quote  Mark this post and the followings unread

Scott: thanks for the detailed explanation. That's kinda what I was looking for. I think at $150 or less, the price point is there. I don't think you need to change your platform unless you want to do it for yourself. For instance, I did buy a Shruthi-1 kit which is $130 at the current exchange rate and that's a little more pedestrian than your stuff..even though I still love it.

Keep up the good work! At some point, I'd like to follow your designs first hand instead of just reading about them!

Bill: thanks for the tip on cheaper Spartan kits. I think one of my kids could order at the academic price and I could "help" them with it. Wink

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PostPosted: Mon Feb 28, 2011 3:12 am    Post subject: Reply with quote  Mark this post and the followings unread

Hi

I new user Spartan-3E starter kit - your project is totaly great for me Smile

My question:

- working this synth on Spartn-3E with internal 12bit DAC ?

- is possible post me source code (this project is open source or only your personal use ?)

Many thanks info

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PostPosted: Mon Feb 28, 2011 7:03 am    Post subject: Reply with quote  Mark this post and the followings unread

Hi JLS,

Heh, I knew someone was going to ask that... Smile I'm glad to see there's that much interest.

Yes, this works using the onboard 12 bit DAC. The simple MIDI input circuit and audio output schematics are in the docs folder. Otherwise, it is self contained on the Spartan board.

I will post the source code here for the current version. I am also posting the VB.NET source code for the patch editor.

Some notes about the project:

* The VB.NET source code compiles under VB.NET Express Edition 2008 which is free from Microsoft. It might also compile under later versions. If you want to create your own patch editor - you're on your own, but the address mapping information is in the FPGA project code (you'll have to read the case code that directs the sysex data to the registers and RAMs)... The VB.NET project was built from a template that includes some things that aren't developed - namely patch file save and load (there is code there, but it isn't complete and probably won't yield anything useful until it is fixed), but the rest works. The VB.NET program communicates with the synth using sysex structured messages, but they are sent to the synth at 19.2 kBaud via a COM port to the DCE port on the Spartan board. The sysex messages could also be sent via traditional MIDI, but since the MIDI controller is pretty much brain dead, you can't send patch data while MIDI notes are being received (it doesn't really obey the rules correctly). This is a flaw in my controller code that I've been too lazy to fix because it's just too easy for me to obey the "one at a time" caveat.

* The FPGA project is written in Verilog. There are some things you might find odd, in the main state machine, there are wait states inserted because the SVFs require several clocks to complete (9 I believe). To keep from confusing myself, I coded empty cases into the case structure. I could have eliminated those by adjusting the state numbers, but while developing that would have likely resulted in "why won't it work now?" by incorrectly adjusting the case numbers. This is just my odd way of "marking" those states as being used outside the top module. There are also a few states where things are done concurrently with but unrelated to the SVF operation, so those states had to be there anyway.

* There is nothing special about the ISE project, so I have included only the source code and not the rest of the project. Simply create a folder for the project, put the source code there and start a new ISE project to which you would add the source code files.

* This project uses digital SVFs which can under certain conditions become unstable. When they do, they can make some very nasty noise, so while you are setting the patch, don't have your amplifier volume up high. The problems will occur more likely at higher pitches, so test all of the notes starting with the lowest. When you hear crunches, it means that either Q should be reduced or the input noise level needs to be reduced. There is also a control that ranges from 0 to 15 to set the number of left shifts used on the output register before the output data is transferred to the DAC. This should be set as high as possible without hearing crunch noise from binary wrapping at the DAC. If the setting is too low, you might hear silence.

* Just so this is clear, you hear two parts in the demo being played by this synth - I did that using two Spartan boards. (I have 4)


Tonal_Noise_Synth_Patch_Editor.zip
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Tonal Noise Synth Patch Editor Project

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Tonal_Noise_ver_c_source.zip
 Description:
Tonal Noise Monosynth ver_c Source Code and Docs

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 Filename:  Tonal_Noise_ver_c_source.zip
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FPGA, dsPIC and Fatman Synth Stuff

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JLS



Joined: Nov 05, 2005
Posts: 426
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PostPosted: Mon Feb 28, 2011 2:24 pm    Post subject: Reply with quote  Mark this post and the followings unread

Hi JovianPyx

Very thanks post your source code - this is great work.

Some settings produce nice and strange sounds Smile

I love this synth Smile

Many thanks

P.S. is possible make in fpga formant and granular synthesis ?

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JovianPyx



Joined: Nov 20, 2007
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PostPosted: Mon Feb 28, 2011 2:47 pm    Post subject: Reply with quote  Mark this post and the followings unread

JLS wrote:
P.S. is possible make in fpga formant and granular synthesis ?


I haven't tried, but I would bet good money it's possible. After all, these can be done in DSP and FPGAs are very very capable of DSP. It's just a matter of whether it fits in a given FPGA. If I understand what a formant synth is, it would be filter based and granular would be RAM table based. It's pretty much limited only by your imagination.

Thank you for the nice comments Smile

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FPGA, dsPIC and Fatman Synth Stuff

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State Machine
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PostPosted: Tue Mar 01, 2011 12:18 pm    Post subject: Reply with quote  Mark this post and the followings unread

Scott, in addition to the audio output and MIDI serial data input, I figured I would mention the inputs that are used to determine MIDI channel. As written in the project UCF file:

# Simple switches for MIDI Channel
# Pull UP resistors used to stop floating condition during switching.
#
#NET "SW<0>" LOC = "L13" | IOSTANDARD = LVTTL | PULLUP;
#NET "SW<1>" LOC = "L14" | IOSTANDARD = LVTTL | PULLUP;
#NET "SW<2>" LOC = "H18" | IOSTANDARD = LVTTL | PULLUP;
#NET "SW<3>" LOC = "N17" | IOSTANDARD = LVTTL | PULLUP;

Bill
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