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 Forum index » DIY Hardware and Software » Microcontrollers and Programmable Logic
Using a serial ADC in a parallel circuit
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seaweedfactory



Joined: Apr 12, 2006
Posts: 74
Location: Portland, Maine

PostPosted: Tue Oct 18, 2011 4:48 pm    Post subject: Using a serial ADC in a parallel circuit
Subject description: For an 8-bit sampler circuit
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I have some old SRAM chips I've been hanging on to for too long, so I've decided to build an 8-bit sampler.

I'm trying not to use a microcontroller for this project. I've used two 4024 counter chips for the address lines, and a TLC7524 DAC tied directly to the data lines of the SRAM chips. This part is working fine, reading out the data to the DAC and producing some fine digital noise.

However, I'm having some reliability problems with the ADC portion.

I'm using the TLC549 ADC, which is an 8-pin serial device. I'm using a shift register (MC74HC595) to store the data that comes out of the ADC. The data is clocked out of the ADC 8-times as fast as the address counter. The ADC has its own internal clock running at 1.1MHz. The idea is to fill the shift register, then write the 8-bit value to the SRAM.

Sometimes this works, sometimes it doesn't. I've tried resetting the shift register in a variety of ways, but I can't get reliable results.

Any ideas? Is there cheap parallel ADC out there that is available through Mouser?

I'm also having problems getting the full range out of the ADC. Can anyone recommend a circuit to put in front of the ADC that would take a bipolar 1V audio signal and shift it to a 0-5V signal?

Thanks everyone! Smile

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Mongo1



Joined: Aug 11, 2011
Posts: 411
Location: Raleigh NC

PostPosted: Tue Oct 18, 2011 7:01 pm    Post subject: Reply with quote  Mark this post and the followings unread

Back in a former life (when I was hardware design guy) I used to do a lot of work with shift registers. By far the biggest problem I used to see was problems with the clock. In some cases you get a little noise on it that causes extra shift operation. Sometimes the clock rise and fall rates are too slow, or too fast. If you're hand wiring it, it's pretty easy to do have too much capacitance on the clock like, leading to a slow rise time. If that's the case you can always try putting a pullup resistor on that line - that can help sometimes.

My first suggestion would be to use a very good scope on the clocks and other logic lines. Make sure the edges are nice and clean, and getting to the right logic levels. Take a look at the datasheet and make sure the rise and fall times are within specs.

If you've got a multi-trace scope, you should be able to feed a fixed level in the ADC, put one trace (the sync) on whichever signal indicates the start of a data word, and the other on the data. In theory you should be able very clearly see a stable pattern on the scope. If not, there's still something wrong.

One other thing that would be helpful is if you have a schematic of what you're doing. There may be something design-wise that is causing the problem.

Gary
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seaweedfactory



Joined: Apr 12, 2006
Posts: 74
Location: Portland, Maine

PostPosted: Wed Oct 19, 2011 7:40 am    Post subject: Reply with quote  Mark this post and the followings unread

Thanks for replying!

I'm using a 40106 for the clock. Maybe I should use a 4046?

I'll try putting together a schematic so this all makes more sense.

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Mongo1



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PostPosted: Wed Oct 19, 2011 7:47 am    Post subject: Reply with quote  Mark this post and the followings unread

Quote:
I'm using a 40106 for the clock. Maybe I should use a 4046?


A 40106 should work fine. But the schematic would definitely help....
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seaweedfactory



Joined: Apr 12, 2006
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Location: Portland, Maine

PostPosted: Wed Oct 19, 2011 9:18 am    Post subject: Reply with quote  Mark this post and the followings unread

Here's a quick schematic of the clock, counter, and ADC section. I'm not showing the SRAM and DAC because it's pretty straight forward. I could draw them up if it would help.

Any thoughts on decoupling?

Thanks for your help, I'm new to digital circuits!


sampler-adc.png
 Description:
Sampler ADC circuit
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sampler-adc.png



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Mongo1



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PostPosted: Wed Oct 19, 2011 9:44 am    Post subject: Reply with quote  Mark this post and the followings unread

Quote:
Here's a quick schematic of the clock, counter, and ADC section


I haven't had a lot of time to sit down and work through this, but I think a lot of the trouble may be the reliance on 4024s. Those are ripple counters.
The issue with a ripple counter is that not all of the outputs change state at the same time. That means you can get glitches all over the place.

I'm also concerned about the clock divider. It seems like when when Q3 pops high, you'll reset the counter, but that will mean that the pulse on Q2 output will also get reset. That means that sometimes Q2 will be a nice wide pulse, and sometimes a short glitchy pulse. Depending on what you're trying to do, that glitchy pulse may really cause some havoc.

My gut tells me that you should really look at designing this using synchronous counters instead of the 4024.

{edit} It looks like there is a nice 4 bit synchronous counter called the 4520 available. You might want to look at using that.

Gary

Last edited by Mongo1 on Wed Oct 19, 2011 10:03 am; edited 1 time in total
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seaweedfactory



Joined: Apr 12, 2006
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Location: Portland, Maine

PostPosted: Wed Oct 19, 2011 10:02 am    Post subject: Reply with quote  Mark this post and the followings unread

Thanks for the advise. I was a little unsure what was happening when the clock divider was resetting. That glitchy output would mess up the results from the ADC.

Can you recommend a synchronous counter that is widely available? I did a quick search on Mouser, but there were many results. Do you think a 4029 would work properly?

Do you think the address counter needs to be synchronous as well?

Thanks again for taking the time to answer my questions.

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Mongo1



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PostPosted: Wed Oct 19, 2011 10:07 am    Post subject: Reply with quote  Mark this post and the followings unread

Quote:
Can you recommend a synchronous counter that is widely available? I did a quick search on Mouser, but there were many results. Do you think a 4029 would work properly?


I was just looking at the 4029, and it probably ought to work, although it's got a lot of bells and whistles that you don't need. If it was me, I'd probably go with the 4520

Gary
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Mongo1



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PostPosted: Wed Oct 19, 2011 10:17 am    Post subject: Reply with quote  Mark this post and the followings unread

Quote:
Do you think the address counter needs to be synchronous as well?


They shouldn't as long as there is enough setup time before you try to access the memory. You should probably be fine as long as you use the inverted clock to derive the read and write signals. That means one phase of the clock will do the counting, and the other phase will access the memory. That's a pretty typical design approach.

Gary
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seaweedfactory



Joined: Apr 12, 2006
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PostPosted: Tue Nov 01, 2011 12:01 pm    Post subject: Reply with quote  Mark this post and the followings unread

This is a video of the circuit as it stands, with ripple counters. I need the breadboard space back, so I'm not sure if I will continue with this design. However, it is good to know what I can do to fix it in the future. Thanks again, Gary.


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Last edited by seaweedfactory on Wed Nov 02, 2011 10:04 am; edited 1 time in total
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Mongo1



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PostPosted: Tue Nov 01, 2011 12:17 pm    Post subject: Reply with quote  Mark this post and the followings unread

That's some pretty wild stuff! I wasn't too sure what was going on there. Were you sampling an incoming stream, or did you have a sample in memory that was constantly replaying? It was a bit difficult to tell.
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seaweedfactory



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PostPosted: Tue Nov 01, 2011 1:17 pm    Post subject: Reply with quote  Mark this post and the followings unread

I was sampling a live stream. When the record lines are down and the samples are being written into memory, the DAC is directly connected to the ADC shift register. So you hear the output of the ADC until the record line is pulled back up. Then you hear the 8k of samples in memory looped over and over.

When I pull the read wire out of the ground, the sound is coming from memory.

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Mongo1



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PostPosted: Tue Nov 01, 2011 1:28 pm    Post subject: Reply with quote  Mark this post and the followings unread

Ah - Thanks for the explanation - that makes a lot of sense.

So, definitely not high fidelity, but we knew that would be the case.

What are your thoughts on this? Do you want to pursue it further and try to create a working module, or do you think it will be more trouble than it's worth?

Gary
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seaweedfactory



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PostPosted: Tue Nov 01, 2011 5:05 pm    Post subject: Reply with quote  Mark this post and the followings unread

I think that once I get the ADC passing in the correct data, the fidelity will be better. The serial ADC makes it more complicated than it should be, parallel ADCs are hard to find (maybe not, know any modern models?), and I just purchased a PIC programmer, so I think I might try my hand at using a micro-controller for this project with a new circuit.

That said, I did learn a lot from this little experiment.

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Mongo1



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PostPosted: Tue Nov 01, 2011 6:34 pm    Post subject: Reply with quote  Mark this post and the followings unread

Quote:
I think that once I get the ADC passing in the correct data, the fidelity will be better. The serial ADC makes it more complicated than it should be, parallel ADCs are hard to find (maybe not, know any modern models?), and I just purchased a PIC programmer, so I think I might try my hand at using a micro-controller for this project with a new circuit.

That said, I did learn a lot from this little experiment.


I've been thinking about doing the PIC thing myself. I write embedded software for a living, so I kind of hate to do it at home too

Gary
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