8-Step Sequencer with voltage controllable pattern (VCPS)

fonik · Posted: Mon Jul 23, 2012 3:48 am Post subject:

all i could think of by now is a propagation delay issue (however, noone reported this behaviour before): the gate is still open when the new clock trigger comes in.
try to leave off the GATE conditioner IC5B, IC5C. does this help?

i will check my builds tonight (hopefully).

fonik · Posted: Mon Jul 23, 2012 2:53 pm Post subject:

billy pilgrim · Joined: Feb 12, 2008 Posts: 35 Location: nyc

Matthias,
Thanks for looking into this, I too thought that some kind off timing offset might be effective but had no idea how to implement it. If you find a solution I'll be keen to try it, thankfully no SMT for me.
FWIW the short "end" pulse reliably triggers my 281 clone at any speed.
billy

fonik · Posted: Tue Jul 24, 2012 12:54 am Post subject:

i just did a quick spice simulation during my morning brake using a RC delay: i put a 10 resistor followed by a 100n cap to GND between two of the inverters.
makes a nice delay, however, i don't know about the exact maths. according RC time constant we would get 1/1000 sec... anyways, you see the problem here: the delay is constant while the speed of the sequencer changes. we will have to find a good compromise, i guess.
i hope to find some time this week to implement this on one of my sequencers, and to find good values.

diablojoy · Posted: Tue Jul 24, 2012 10:15 pm Post subject:

Matthias I think this looks like the issue i came across a while back scott stites has a good example of the behaviour on his
matrix sequencer page that he is working on, it seems it is inherent to the 4017 operation which overlaps its outputs
if it is the same problem i did a little slew daughter board a while ago to get round it for the sequential switch part on that ludicrous symple64 build of mine.
I will dig up the details when i get home tonight and see if it can be incorporated somehow from memory the slew delayed the leading edge of the clock by around 150usec
cheers
Denis

diablojoy · Posted: Wed Jul 25, 2012 1:48 am Post subject:

fonik · Posted: Wed Jul 25, 2012 2:09 am Post subject:

will try this simple delay in the clock line tonight:

Posted Image, might have been reduced in size. Click Image to view fullscreen.

[edit: picture updated and embedded]

fonik · Posted: Wed Jul 25, 2012 3:42 am Post subject:

okay, i just tested it during the lunch brake. my simple clock delay circuit works like a charm. i ended up with the trimmer set at about 9k, so 10k should still be working nicely.

SO ALL WHO EXPERIENCE PROBLEMS WITH A 2ND (GATE OFF) TRIGGER GENERATED
refering to sketch in post above:
1) bend up pins 10 & 13 of IC5 (the 40106 hex inverting schmitt trigger) - hopefully you have them socketed.
2) solder a 10k resistor between these pins (right on top of the IC).
3) solder a 100n cap from pin13 IC5 to GND (i.e. at the decoupling cap).

billy pilgrim · Joined: Feb 12, 2008 Posts: 35 Location: nyc

Mod works really well, though I had to use 200n. It's a great module..........

fonik · Posted: Wed Jul 25, 2012 11:12 pm Post subject:

brother303 · Joined: Nov 02, 2010 Posts: 139 Location: ruhr-area/germany

Hi Fonik,

do you still have pcbs on stock? I´d like to purchase another one.

Cheers
Greg

Wink