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555s in focus
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Uncle Krunkus
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PostPosted: Sun Nov 04, 2012 3:21 pm    Post subject: 555s in focus
Subject description: Getting low->audio freq clks from astables
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In the Nexus 1 thread here
http://electro-music.com/forum/topic-54532.html
I'm trying to refine an old build from a time when I didn't know half as much about 555s, CMOS, and audio electronics in general, as I do now. ( Which only half as much as I'd like to know, which is only half as much as some already know, etc. etc! Laughing )
Anyway, I'd like to fix up these 5 * 555 clock sources. Especially, get them running faster and more stable. I do still need them to be easily set at really low frequencies too, so maybe I'll need a cap switch. (hope not, no space left really! Embarassed Laughing )
At the moment, I can only get them to about 20-50hz before they lock up and don't oscillate at all. The schem shows where it's at.
I could add a resistor and a diode to widen the pulse width, would that help?
What about that 10-100nF cap which often hangs off pin5 (CV) to ground? That has a stabilising effect on the frequency dosen't it? Should I add them?
I know they are all NE555 types at the moment, but I want to change them all to LC555s once they are set up better. Then I'll be able to get a current reading before and after, which would be interesting to see. I hope the frequencies wouldn't change with CMOS, as the RC concept is the same either way, hey?
Anyone got ideas?
I don't mind if this thread becomes a general look at 555s and what we can assimilate into the Lunetta brains trust. Very Happy


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PostPosted: Sun Nov 04, 2012 6:36 pm    Post subject: Reply with quote  Mark this post and the followings unread

Hi there,

I've been looking at this and putting your component values into my my 555 spreadsheet. The trouble is that the normal astable calculations have to have a value for the 2nd resistor been pins 2/6 and 7. If you put in zero (which you've effectively done) the spreadsheet say "does not compute" as it has to divide by zero (which gives a meaningless answer).

What sort of frequency range (max/min) do you want to get from this circuit? That will help me to work on the best solution. It would definitely involve a resistor between pins 2/6 and 7 and probably another small one between pin 7 and your pot. The diode(s) might not be needed, depending on how narrow a pulse (or wide a pulse) can clock your other circuits.

I would also add the 10nF cap between pin 5 and 0V and I always connect pin 4 to pin 8 (V+ rail) in such astables (although I get much the same result with pin 4 not connected). You may need the dreaded cap switch pot if the total range is too large for 1 capacitor.

Let me know want you are aiming for and I should be able to work something out. I can also explain the calculations used.

Cheers,

Gary
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PostPosted: Mon Nov 05, 2012 3:23 am    Post subject: Reply with quote  Mark this post and the followings unread

Okay,
I've updated the design with a couple of these ideas.
The 1M trim with the 1M fixed gives the functionality of a 500K log pot.
1K discharge resistor widens the pulse a bit. The cap will need to be changed for the final range (once we work it out). The 1K can come up if need be to scale the trimmer.
100n from pin5 to ground. Pin4 to +ve.

I'm looking at an upper limit of about 8khz and a lowest frequency of .5hz

What do you think?


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PostPosted: Mon Nov 05, 2012 8:17 am    Post subject: Reply with quote  Mark this post and the followings unread

Just to let you know, I am thinking about this still, but I'm coming to the conclusion that this range of frequencies is very hard to acheive using one capacitor. In theory, I can put values in which seem to give the entire frequency range, but they don't work well (or at all) in practice. One problem is that the duty cycle tends towards 100% at one end of the pot (i.e. the output goes high all of the time). Steering diodes could be used, but then you'd need a dual-gang pot to keep the duty cycle constant. The other problem is that of fine frequency control. If the pot value is much larger than the resistor between pins 6 and 7, the frequency increases slowly as you turn the pot, but then rises very quickly towards the end, so is very hard to set accurately (almost impossible, in fact). If the pot value is closer to the resistor value, you get much better control, but a much narrrower frequency range (a bit of a Catch 22). One way around this problem could be adding a second smaller 'fine tuning' pot in series with the 'coarse' one.

So, at the moment, I can only see a solution by adding capacitor switching and possibly a second pot as well for fine tuning.

As an aside, I think that your original idea for the circuit does work (to some extent) because there is some inherent resistance inside the 555 chip, so the equations do make sense. If you put in even the smallest resistance between pin 6 and 7, the equation doesn't have a divide by zero situation and so gives a meaningful result.

Sorry I haven't got an instant answer - let me know if you want to proceed with the way I'm thinking at the moment.

Gary
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PostPosted: Mon Nov 05, 2012 5:35 pm    Post subject: New Idea? Reply with quote  Mark this post and the followings unread

I've tried a different approach to this problem and I've had better results. The circuit below has a different (and simpler) arrangement to the "normal" astable (note that pin 7 is not connected to anything). Also, I haven't shown any supply decoupling capacitors here. It has the advantage that the duty cycle doesn't change much with frequency. I've still needed to add a second pot for the fine tuning (the 220K lin - I just happened to have one at hand, you could try a 100K). Officially, the frequency is given by:

f = 1/(1.44 x R x C)

R will be the sum of all 3 resistances between pins 2/6 and pin 3. My actual measured values did not agree exactly with this, but were in the same ball-park. They also seemed to vary somewhat with supply voltage (I can't remember the voltage that you plan to use). With a 12V supply, I got the following results:

If C = 100nF, f = 8.9Hz to 11.2kHz

I C = 1uF, f = 0.46Hz to 635Hz

The duty cycle ranged from about 54% to 60% (that is the signal level was high for 54-60% of the time for each high-low cycle). The tuning was still a bit fiddly, but was much easier than my attempts on the original astable design. To get from 0.5Hz to 8kHz, you would need switching in the current set-up.

I also checked that the output was OK for CMOS, so I used a 4024 to half the frequency. I did this at two different 555 frequencies and it worked well (see traces attached). You can see that at the higher frequency, the waveform gets a little out of shape, but this is common at higher squarewave frequencies. The important thing is that in both cases, the 4024 successfully halved the original signal frequency.

You might like to play with this circuit yourself and see what you think, but I think that it is more promising than the original idea.

Cheers,

Gary


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PostPosted: Tue Nov 06, 2012 4:00 am    Post subject: Reply with quote  Mark this post and the followings unread

My biggest problem is that it's already built, so I pretty much want to stay with the original config, and I want to stick with 500K trimmers, or higher so I have the option of touch sensors later.
But another thought occured to me.
There are four of them.
I should set up each one for a different frequency band, by keeping the resistors the same across all four, to get a range of just over an octave, and then just use a different sized cap for each. Which is kind of what the schem hints at anyway.

Keeping in mind that it's more percussive than melodic, I'd say 0-200,200-400,400-800,800-1600hz bands for the four clocks.
(No, this is wrong, I'll correct it when I've worked it out! Laughing )

Yeah, I think that earier design just charges through the resistor, but having (virtually) none to discharge it just produces spikes. Luckily they clock 4017s which can pick it up. If R2 is larger does that make tuning easier? Cos I could just as easily have it at 500K as well, but the cap would be suddenly very small, and inaccurate. Remember this trigger just clocks sequencers and is not heard, I reckon R2 could be 20K or so.

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PostPosted: Tue Nov 06, 2012 3:34 pm    Post subject: Reply with quote  Mark this post and the followings unread

Sorry, I was getting confused last night about the frequencies which I want to come out of these clocks.
They need to come up to frequencies which I can use as actual tones, but they don't need to go very high, as it is percussive sounds which they will have the potential for. These clocks run 4017 sequencers, which output gates, which are used to power the main oscillators. I can get higher frequencies out of them. But by pulsing the oscillators supply at low audio frequencies, you get a completely different kind of sound.

So,......

These four 555 clocks need to have upper frequency limits of : -
20hz, 40hz, 80hz, and 160hz.
Their lower limits all need to be at or just below 1hz (60bpm)

Thanks for all your ideas analog_backlash, it's really good to bounce ideas around. Sometimes just typing something up will clarify and consolidate knowledge. It's great to have that kind of exchange with someone who is thinking about the same kind of stuff, on the other side of the world. It wasn't like this in the 70s! Laughing

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PostPosted: Wed Nov 07, 2012 6:21 am    Post subject: Reply with quote  Mark this post and the followings unread

Okay,
So I used the calculator here :- http://www.bowdenshobbycircuits.info/555.htm
And came up with these figures
R2 is fixed at 7K5

Frequency when R1 is at 500K Frequency when R1 is at 1K C
.59hz 19.1hz 4u4
1.2hz 40.9hz 2u2
2.7hz 90hz 1u
5.9hz 191.4 470n
Sorry bout the formatting.


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PostPosted: Wed Nov 07, 2012 6:54 am    Post subject: Reply with quote  Mark this post and the followings unread

Sorry about the delay in replying. I only noticed your new updated request very late last night. I've checked your figures and they seem to agree with my calculator. There are some very small differences, but that's due to the fact that I've used the natural log of 2 in my calculator (ln2 ~ 0.693, 1/ln2 ~ 1.44).

I took a slightly different approach, keeping the timing capacitor value constant, as you can see by the table below. My R1 (which is not used at all) could be added to get the 1uF values to fall below 1Hz (your lower end requirement). The duty cycle values (DC on the table) do get rather large, but JingleJoe assured me that this would not be a problem in triggering a CMOS circuit (I was going to try it out as a sanity check, but I haven't got round to it yet).

By the way, if anyone disagrees with my duty cycle calculations, it may be because the datasheet definition give the % output low figure. When I measure it (on my multimeter or scope) it gives the % high figure, which is the figure I've given. I think that it might be down to a subtlety of the definition of duty cycle which (I think) is the proportion of time that the device is under load (I'm sure someone out there knows the answer to this).

Anyway, I hope this helps.

Gary

P.S. I looked up where you live on Google Maps and it seems a good deal more picturesque than Aldershot!

WARNING!!!!

I thought that there was a good reason for R1 on my diagram (I usually put in a small fixed resistor here). If you don't add this resistor (a) the 555 stops oscillating at one end of VR1 and (b) the chip gets hot and will eventually expire! This is because you are connecting pin 7 directly to the positive rail. I'm going to do some re-calculations with a small value of R1 and I'll post them later.

I have now amended the diagram and have a 100R resistor in each R1 position. pale I've also measured all the values to see how they compare. I've used only E12 resistors, obviously you could get a bit closer with E24 values. I've also reversed the DC columns, because the maximum pulse width occurs at the minimum frequency.

I hope that you haven't blown up any 555s yet. This may have been the problem with your original design. I haven't tried TS555CNs or 7555s yet, but I suspect that they will give similar results.


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PostPosted: Wed Nov 07, 2012 4:35 pm    Post subject: Reply with quote  Mark this post and the followings unread

Just tried out the 555 oscillator driving a 4017 to check that it clocks correctly even at very high duty cycle values. No problems, except that it's hard to get my PC scope to show the widest pulses clearly, on a setting showing the 4017 output as well, so I compromised and chose a ~95% setting. The result is attached. The 4017 is dividing by 5 in this example.

There is still a slight problem with accurate tuning at the high end, especially of the (roughly) 1Hz to 160Hz oscillator. If you try it out, you'll see what I mean. Without a second pot (which I know you can't add) I'm not too sure how you can improve on this.

Anyway, see how it goes - it might be good enough for your purposes. I look forward to hearing the results.

Gary


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PostPosted: Wed Nov 07, 2012 5:02 pm    Post subject: Reply with quote  Mark this post and the followings unread

Yeah, Smile
It's these subtle little things (like don't connect pin7 to +ve directly) which I wanted to tease out. This is important when you're playing with this stuff for the first time. It's one thing put something together, but there's a real glow when you start to understand how to do it well.
Thanks heaps for the fixed cap data. I can't see any reason for not going that way. Except that I do need to keep R1max at 500K. I've only got room for 1 trimpot. So I have to use the 2*1M configuration to extract some log functionality with a lin trimmer. Does that make sense?
So I'd love to see some similar tables with R1max at 500K. Rolling Eyes Laughing

BTW Part of the reason it's cool to check this all out first is that the Nexus 1 is getting so complicated, that an upgrade like this feels like major brain surgery. I appreciate the chance to be 100% sure of how and why I'm going in there! Confused
But I'm sure the patient will be feeling heaps better afterwards. Laughing

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PostPosted: Wed Nov 07, 2012 6:06 pm    Post subject: Reply with quote  Mark this post and the followings unread

Oh right! I get it now. You've actually got more of an antilog shape there (see attached), if you compare it to the graphs in this article:

http://sound.westhost.com/pots.htm

I think that this should help with the tuning issue. I'll try that out tomorrow and I'll do some more tables to suit.

As for connecting pin 7 to the positive rail, I have something at the back of my mind that says that you can do things with CMOS 555s which can't be done with conventional ones, but I can't remember exactly what the details are. I wouldn't try it with the more expensive chips unless I can find out the exact info...

I think that we're both learning things here!

Cheers,

Gary


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PostPosted: Thu Nov 08, 2012 6:43 am    Post subject: 500K Astable Table Reply with quote  Mark this post and the followings unread

OK. The attached table is for your 500K setup. The capacitances have to be larger to get the right range, so I've done them at 3.2uF and 4.4uF (I assume that you're putting in 2 capacitors in parallel here).

I had a bit of an issue with Bill Bowden's calculator. I said that it differed a bit with my figures, but the difference was slightly too much, so I assumed that I'd got something wrong. I did some long-hand calculations, which agreed with my spreadsheet. I then tried a couple of other website calculators and again, they agreed with my figures. I'm not sure what's going on there. This is one of those that agreed with me:

http://www.ohmslawcalculator.com/555_astable.php

I haven't got round to checking these figures on a breadboard yet, but they should be about right. Again, I've chosen E12 resistors (mainly because I've got them), but you might want to try E24 values if mine aren't close enough.

UPDATE: I've now done the breadboarding and added the results to the table. The 3.2uF frequency figures came out a bit higher than expected, but it might have just been that a capacitor was a bit on the low side of its tolerance range (or possibly outside it).

Cheers,

Gary

P.S. This is very different to the '70s - I must have given my age away somewhere...


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PostPosted: Fri Nov 09, 2012 12:41 am    Post subject: Reply with quote  Mark this post and the followings unread

Man,
Thanks heaps for that last table, it will basically become my bible for a little while! Laughing
Really good figures.
I think I have all the knowledge I need to start the operation, but I'm procrastinating at the moment. Oh, and I need to actually get the 1M trimmers.
The next thing I need to look at is the WSG filter I'm hanging off the other end. It doesn't perform as well as I remembered, and I'd like to get to know what's going on there if you're up for more adventures. I'd start another thread for that though.

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PostPosted: Fri Nov 09, 2012 2:16 am    Post subject: Reply with quote  Mark this post and the followings unread

I'm gonna go in soon, maybe tonight, maybe LOTRO. Embarassed
I have to re-build 5 * 555 oscillators, in situ,....hmmm
Can you tell that I'm feeling lazy?
Must be these pain killers I'm on for my back. There was the pos. side effects of lethargy and the loss of concentration. So I shouldn't beat myself up too much hey?
Oh, I forgot to mention the master clock. It's 4017 inhibits these four in sequence. Same deal, just needs to run about 8 times slower. So I assume we triple the cap value? 8=2^3 yeah?

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PostPosted: Fri Nov 09, 2012 7:01 am    Post subject: Reply with quote  Mark this post and the followings unread

It's funny that you should mention bad backs, as I'm also suffering at the moment (currently without painkillers Crying or Very sad ). And I certainly go through lazy periods (or can't-be-arsed periods as we Brits might say).

I might need a bit of clarification here. You say that your master oscillator need to be 8 times slower than the others. Do you mean starting at about 0.125Hz? What does the upper limit need to be? Also, I'm a bit confused by your 3 capacitor comment (unless I've got completely the wrong end of the stick, which is quite possible). The frequency of the astable is inversely proportional to the timing capacitor, so (all other things being equal) this would mean that the capacitor needs to be 8 times the value. This would probably have to be a tantalum bead type, as normal electrolytics are not recommended for timing (unless you want to put up to 8 non-polarised capacitors in parallel!). The other possibility (of increasing the resistance) is not really viable, as we're already using a 1M0 pot and if you raise R1 and/or R2 (in my diagram) it begins to severely limit the tuning range.

Just to give you an idea, I have put a 22uF capacitor (C1) and 6K8 resistor (R2) into my calculator (still with VR1 = 500K and R1 = 100R) and I get a frequency range of 0.128Hz to 4.79Hz.

As for your other post (about the WSG filter) it's not something I know vast amounts about, but I'll certainly try to help!

I'll leave you to your LOTRO now (are you Gandalf?). Looking forward to the release of the Hobbit film. They've just opened a new cinema in Aldershot (we haven't had one for several years) and I've only seen the outside of it so far.

Gary.

Addendum

I've added yet another table, with a 470R resistor replacing the 100R one. I was a little concerned that although the 555 seemed fine, the resistor felt a bit hot. After measuring the current through it, I realised I was exceeding 0.25W - not a good idea. With the 470R resistor, it's now at about 73mW, so it should easily be OK.

Actually, reading your Nexus 1 thread, I noticed that JingleJoe had already mentioned that you needed a resistor here to stop the 555 from dying. He also suggests putting the pot between pins 6 & 7, so that the duty cycle doesn't change as much - I'll have to try that as well now...

I've also been playing with the WSG Oddness filter, just so that I can make (semi-)informed comments about it, when necessary.


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PostPosted: Sun Nov 11, 2012 4:09 am    Post subject: Reply with quote  Mark this post and the followings unread

I just noticed on that last table (as I'm building it) it contains 3.2uFs, when the E12(?) series only has 3.3uFs. Which did you use? Cos I can't find 3.2s. Not sure if that would change the other values, or not.
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PostPosted: Sun Nov 11, 2012 3:43 pm    Post subject: Reply with quote  Mark this post and the followings unread

Ah yes! Because you had mentioned 4.4uF in an earlier post, I assumed that you were using 2 x 2.2uF capacitors in parallel, so I used 3.2uF which is a 1uF and a 2.2uF in parallel. If you have a 3.3uF, that should give similar results. The problem with capacitors is, due to their wide tolerances, they're not so easy to find in the E12 series values (i.e. multiples of 1.0, 1.2, 1.5, 1.8, 2.2, 2.7, 3.3, 3.9, 4.7, 5.6, 6.8 and 8.2). Sometimes, you can only get E3 values, which are are a subset of the above (1.0, 2.2 and 4.7 or possibly 1.0, 2.0 and 5.0). God, this is tedious to type - I hope that's it's not as tedious to read...

Gary

Additional (& apology)

I've just added a theoretical values table with optimum values of R2 for a 3.3uF capacitor. The apology is that I've realised that I'd made a typo in the previous table - C should have read 3.2uF for all of the top part and not have 2.2uF in the 2nd and 3rd line. Table is now corrected. I hope that you haven't already soldered in the 2.2uFs.


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PostPosted: Mon Nov 12, 2012 4:54 am    Post subject: Reply with quote  Mark this post and the followings unread

analog_backlash wrote:
I hope that you haven't already soldered in the 2.2uFs.


Nah, I finished the first one, but I went 3u3 tantalum anyway. Cool

BTW I didn't even know which E series I was on about! The one I should have said was the E6 series. E12 generally kicks in about 820n with MKTs.

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Uncle Krunkus
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PostPosted: Mon Nov 12, 2012 3:23 pm    Post subject: Reply with quote  Mark this post and the followings unread

Okay,
I've done the first event clock, I'm gonna do the other three after I've done the master clock.
Now to set it at 1/8 the speed is not really realistic, as it's really a BPM control. Alot better to just set it up for .9hz to 4.5hz. What does your wonderous timing table say about that Gary? Very Happy
The other thing I need to do is the best enhancement of this clock, which is to be able to bypass it with a trigger in from the outside world. To emulate the 555 output from an external trigger, I think I just need a small current limiting resistor (20R?) into the front end of a 9V1 zener to ground. Then straight into the 4017? Or do I need to invert it with a spare XOR? I think the 4017 triggers on a negative going edge doesn't it? Then I need a pull down between the two gates? yes? The standard trigger length is 20ms, so maybe 20ms of lag is not as problematic as stealing that XOR. Not sure.

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analog_backlash



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PostPosted: Mon Nov 12, 2012 5:56 pm    Post subject: Reply with quote  Mark this post and the followings unread

OK.

First the easy bit. With the same setup as before (VR1 equivalent to 500K, R1 = 470R and C = 3.3uF), R2 = 47K gives a theoretical range of 0.74-4.63Hz. I hope that this is close enough.

Secondly, the trickier bit, which I think I need some clarification on. I assume that the zener circuit is there because the "outside world" trigger could be from a higher voltage source - is that correct? Next, I had one of my crises of faith in my own knowledge. I thought that the 4017 triggers on a POSITIVE going edge. I checked and I was right, but then I still needed to convince myself on my 'scope (I already had the circuit breadboarded). I'm now 100% certain that I was correct, so the inverter shouldn't be necessary! After this, I got a bit confused (I'm getting tired - that's my excuse for being a bit thick Confused ). Are you saying that the 555 clock and the "outside world" trigger will be coming in simultaneously and that the XOR(s) are being used to override the 555 signal when an external pulse is received? Could you do a simple diagram to show me what you're planning, then it might sink in...

Gary
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Uncle Krunkus
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PostPosted: Mon Nov 12, 2012 6:14 pm    Post subject: Reply with quote  Mark this post and the followings unread

I meant that if I needed an inverter, I could use a spare XOR with one input held high, as the chip is already there. Although I would prefer all those XORs for the use of the oscillators.
No, the 555 clock and the external clock are completely independent. I'll have the 555 clock normaled in a 3.5mm stereo socket back to the 4017. The zener setup is just to save the 4017 from 10-15V pulses when it's running on a <9V battery.

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PostPosted: Tue Nov 13, 2012 9:28 am    Post subject: Reply with quote  Mark this post and the followings unread

I must admit that I've only just started thinking about this (other things to do). For your zener resistor, I would be tempted to use a larger value, but this may well be overkill. The worst case voltage drop across R is when you have a 15V input, so it's 15 - 9.1 = 5.9V. Now, P = V^2/R (from P = IV and V = IR), so for a 1/4W resistor:

R = V^2/P = 5.9^2/0.25 = 139.24R

So, I'd use a 150R resistor here:

P = V^2/R = 5.9^2/150 = 0.232W (<0.25W)

As I say, this may be overkill, since we are not talking about a continuous 15V supply, but 15V pulses (presumably). Anyway, I like to err on the side of caution. Also, in a rather unscientific way, I would prefer to have a current limiting resistor between the zener output and the 4017 clock input (maybe 1K0?). This might not be needed, but I feel safer that way (and I'm pretty sure that it would clock the 4017 correctly).

Please forgive my stupidity on the rest. I'm still not sure which two gates that you're referring to (the ones that you need a pull-down resistor between?).

Anyway, I may be wrong, but that's my thinking! Very Happy

Gary
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PostPosted: Thu Nov 15, 2012 5:26 am    Post subject: Reply with quote  Mark this post and the followings unread

Okay,
I've re-built all 5 clocks, and when I say re-build, I mean re-build.
Idea A word of warning to anyone using stripboard, think real hard before you put a link under an IC socket! Idea
Well, at least be 100% sure that the board will not be changed in the future. That's a pretty hard call to make in SDIY don't you reckon?
Well,.... that's how I had pins6&7 shorted. So,... all the sockets had to be ripped out with plenty of solder dripping all over the pins. After they're out, you clean it all up with a solder sucker and wick, if needed. I've also taken up the habit of having a tiny flat ended file handy, with a thin strip of 800grade wet and dry wrapped around the end. Just to shine up the spot I'm about to solder. Makes it soooo easy. Very Happy
I also had to cut the track between pins2&7, and change all the other components, mostly. I could only fit the 1M(25turn) log effect on two of them, the other two are just 500K piher style timmers.
This thing actually feels sometimes like it's building itself! Shocked Cool Laughing

The next step is to have a look at the oscillators. I've realised that it's probably better to break down the Nexus 1 into sections which can be easily digested, so I'll be starting a new thread for that.

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