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Cynosure
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Joined: Dec 11, 2010 Posts: 942 Location: Toronto, Ontario - Canada
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Posted: Wed Feb 08, 2012 4:53 pm Post subject:
Simple Envelope for Monotron? |
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The monotron has a gate signal that is on while the note is on and off when the note is released. I tried using a cap and resistor to ground to change it to a pulse and then trigger this circuit:
http://yusynth.net/Modular/EN/ADSR/index_old.html
However, that circuit uses +12/0/-12V, and the monotron runs on +5/0V.
The circuit did not work correctly when I tired it using +5/0V and a virtual ground for the opamp.
Does anyone have a schematic for a very simple envelope that will work with +5/0V? I am just looking for A and D. S is optional, and R won't work since the montron shut off its sound when the note is released. _________________ JacobWatters.com |
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comrade_zero
Joined: Mar 05, 2009 Posts: 63 Location: arizona
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Posted: Wed Feb 08, 2012 11:02 pm Post subject:
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I'm trying to think of a specific schematic offhand, you could try Ray Wilson's WP-20 a/d generator. (This technique is used elsewhere as well.) Basically it involves charging and discharging a cap through a pot and a diode. Your attack time will be limited to the total "on" time of your gate, so I don't recommend using a pulse. But you should have no problems running something like that off of 5 volts.
Good luck, hope this helps.
c_z |
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JovianPyx

Joined: Nov 20, 2007 Posts: 1585 Location: West Red Spot, Jupiter
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Cynosure
Site Admin

Joined: Dec 11, 2010 Posts: 942 Location: Toronto, Ontario - Canada
Audio files: 82
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Posted: Fri Feb 10, 2012 2:16 pm Post subject:
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Sorry for the delayed response - I have been sick the past couple of days.
Scott - I will give yours a try this weekend. Thanks for posting the schematic.
If I can't get it to work, then I will try the Ray Wilson one.
Thanks JovianPyx and comrade_zero!
***EDIT***: Scott - the monotron uses +5/0V. There is no -5V. I will have to try the TL071 with a virtual ground and see if that works. _________________ JacobWatters.com |
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JovianPyx

Joined: Nov 20, 2007 Posts: 1585 Location: West Red Spot, Jupiter
Audio files: 190
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Posted: Fri Feb 10, 2012 2:29 pm Post subject:
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That won't work. If that's the case, only +5 and 0, then try LM324 instead of TL07x. If the LM324 provides too much of a load (i.e., if it works, but the A and D times are too short), then increase capacitor C. _________________ FPGA, dsPIC and Fatman Synth Stuff
Time flies like a banana. Fruit flies when you're having fun. BTW, Do these genes make my ass look fat? corruptio optimi pessima
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JingleJoe

Joined: Nov 10, 2011 Posts: 878 Location: Lancashire, England
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Posted: Sat Feb 11, 2012 4:12 pm Post subject:
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I've made a similar 555 timer envelope recently; using a regular monostable circuit you can input a gate signal to pin 4 (reset) and trigger to pin 2 (trigger), then the decay will act as a release too when the gate goes low. Also one will have to connect the potentiometers differently than in the above circuit, seems like it should work, but I don't think it does ... I would put two diodes in series with two potentiometers (diodes facing in different directions for charg/discharge (attack/decay+release)) between pins 6 and 7 and a 1k resistor on pin 7 to +V. that should just make the 555'er happier. _________________ As a mad scientist I am ruled by the dictum of science: "I could be wrong about this but lets find out"
Green Dungeon Alchemist Laboratories |
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JovianPyx

Joined: Nov 20, 2007 Posts: 1585 Location: West Red Spot, Jupiter
Audio files: 190
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Posted: Sat Feb 11, 2012 4:36 pm Post subject:
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Thank you for catching that.
Diodes alone wouldn't solve the problem, since pin 8 is 5 volts all the time. Pin 3, however, is not, but is capable of good output current.
The new schematic uses the output pin (3) to drive the charging current through the attack pot. Since pin 3 drives only when discharge (7) is high impedance, it should work.
I've updated the drawing above.
EDIT: I've removed the decay diode. It's not neccesary because the discharge transistor is just an open drain N MOSFET. _________________ FPGA, dsPIC and Fatman Synth Stuff
Time flies like a banana. Fruit flies when you're having fun. BTW, Do these genes make my ass look fat? corruptio optimi pessima
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JovianPyx

Joined: Nov 20, 2007 Posts: 1585 Location: West Red Spot, Jupiter
Audio files: 190
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Posted: Sun Feb 12, 2012 3:20 pm Post subject:
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I saw what you wrote in chat. It sounds like it's not triggering. Pin 2 should be normally about 5 volts when the circuit is idle. It should bounce briefly to zero volts when the gate is applied.
To test the rest of the circuit you can do the following which will test the 7555 setup without the gate to trigger converter.
1) disconnect the gate circtuit from pin 2 of 7555
2) set the Attack control to something around halfway.
3) set the Decay control to zero resistance.
4) connect 7555 pin 2 to +5 through a 10K resistor.
5) using a piece of wire, breifly ground pin 2 of 7555. This should trigger the AD to do a cycle. If it doesn't, there's a problem with the 7555 part. If it does, then there's a problem with the gate to trigger converter (like the resistor to ground after the cap is too big). _________________ FPGA, dsPIC and Fatman Synth Stuff
Time flies like a banana. Fruit flies when you're having fun. BTW, Do these genes make my ass look fat? corruptio optimi pessima
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Cynosure
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Joined: Dec 11, 2010 Posts: 942 Location: Toronto, Ontario - Canada
Audio files: 82
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Posted: Sun Feb 12, 2012 3:23 pm Post subject:
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This still isn't working correctly. My pulse signal is very weak after being filtered and sent through the opamp. Maybe that is the problem?
I can't test it our properly because I don't have a proper scope (just an app that uses my soundcard).
Could someone please test it out and let me know what values to use for the unmarked resistors and caps?
My gate signal 5V and stays on the entire duration of the note. You can probably use a 555 timer or 40106 osc for a test signal that turns off and on. _________________ JacobWatters.com |
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Cynosure
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Joined: Dec 11, 2010 Posts: 942 Location: Toronto, Ontario - Canada
Audio files: 82
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Posted: Sun Feb 12, 2012 3:29 pm Post subject:
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I just saw your post after I posted mine. I tried your test, and it didn't work, so i guess it is the 7555 part that is mess up some how.... _________________ JacobWatters.com |
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Cynosure
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Joined: Dec 11, 2010 Posts: 942 Location: Toronto, Ontario - Canada
Audio files: 82
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Posted: Mon Feb 13, 2012 7:23 pm Post subject:
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Ok I got the 7555 part working correctly. I had pin 4 connected to ground instead of Vdd.
Now I am having trouble with the trigger signal. Might gate is 5V on and stays on for the duration of the note.
What are good values for the cap and resistor to get it to make a usable pulse?
Are you certain that the first opamp is working like it should? _________________ JacobWatters.com |
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Cynosure
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Joined: Dec 11, 2010 Posts: 942 Location: Toronto, Ontario - Canada
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Posted: Mon Feb 13, 2012 8:47 pm Post subject:
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Thanks again Scott for the help in the chatroom. You're the best!
Also, thanks for updating the schematic with all the values. _________________ JacobWatters.com |
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JovianPyx

Joined: Nov 20, 2007 Posts: 1585 Location: West Red Spot, Jupiter
Audio files: 190
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Posted: Mon Feb 13, 2012 9:00 pm Post subject:
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The schematic is now in a working state. _________________ FPGA, dsPIC and Fatman Synth Stuff
Time flies like a banana. Fruit flies when you're having fun. BTW, Do these genes make my ass look fat? corruptio optimi pessima
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beep

Joined: May 05, 2013 Posts: 105 Location: Germany
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Posted: Fri May 10, 2013 1:12 pm Post subject:
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is the 7555 different from the standard NE555??? |
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JovianPyx

Joined: Nov 20, 2007 Posts: 1585 Location: West Red Spot, Jupiter
Audio files: 190
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Posted: Fri May 10, 2013 1:30 pm Post subject:
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cablebob wrote: | is the 7555 different from the standard NE555??? |
Yes.
NE555 is a bipolar 555 timer part.
7555 (sometimes with other letters like ICL7555) is a CMOS part.
They are pin function interchangeable.
The bipolar 555 timer has a nasty habit of crowbarring the power supply when it changes the state of pin 3. This is because the IC design causes both output transistors to be on at the same time for an instant. This results in a current spike that can propogate to other circuits via the power supply connection.
The 7555 is CMOS and does not do the crowbar. The output system is designed with the intention that both output transistors are never both on at the same time. (In reality, there is a much smaller instant in time where both are on, but only "half way on" at the same time, this time is far smaller than that exhibited by the bipolar 555 and the on state is not saturation). In most circuits, the two are pin for pin interchangeable. Try the circuit on breadboard first to make sure a 7555 will work (most of the time it does). If a 7555 works - it is far preferable to a 555. _________________ FPGA, dsPIC and Fatman Synth Stuff
Time flies like a banana. Fruit flies when you're having fun. BTW, Do these genes make my ass look fat? corruptio optimi pessima
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beep

Joined: May 05, 2013 Posts: 105 Location: Germany
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Posted: Fri May 10, 2013 4:43 pm Post subject:
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LOL That might have caused the strange interactions when I tried to detune two of my accidentaly-super-simple-vcos against each other.
something like harmonics-quantized-sync
will the 555-324-AD envelope only with the 555?
I still wonder if I did something wrong or if the chip is to blame
greetings |
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jackdamery
Joined: Apr 26, 2010 Posts: 75 Location: UK
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Posted: Sat May 11, 2013 7:18 am Post subject:
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JovianPyx wrote: | Here's what I was thinking yesterday. It's NOT tested. Not sure if this is useful for you tho.
EDIT ADD: I've changed the schematic. The earlier one had problems. |
Hey, does this circuit work? |
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JovianPyx

Joined: Nov 20, 2007 Posts: 1585 Location: West Red Spot, Jupiter
Audio files: 190
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Posted: Mon May 13, 2013 6:07 pm Post subject:
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HOW IT WORKS:
At rest, the circuit is idle with pin 3 at zero volts.
When triggered, pin 3 immediately goes high. This supplies the charging current for C through the ATTACK pot. Once the voltage on C reaches the threshhold, the transistor (internal to the 7555) turns on and begins to discharge C through the DECAY pot. This process causes a simple attack and decay voltage at AD output.
Note that there is a diode in the path from pin 3 to C. This prevents pin 3 from discharging the cap. Because of the diode, pin 3 can only charge C. _________________ FPGA, dsPIC and Fatman Synth Stuff
Time flies like a banana. Fruit flies when you're having fun. BTW, Do these genes make my ass look fat? corruptio optimi pessima
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jackdamery
Joined: Apr 26, 2010 Posts: 75 Location: UK
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Posted: Tue May 14, 2013 4:53 am Post subject:
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hey, so you have tested this circuit and it works? what is pin 3 connected to after the diode? it doesn't seem to be connected to anything. |
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Cynosure
Site Admin

Joined: Dec 11, 2010 Posts: 942 Location: Toronto, Ontario - Canada
Audio files: 82
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Posted: Tue May 14, 2013 5:10 am Post subject:
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Click on the image to see it full size. some lines are missing when the gif is resized.
It works perfectly. I used it in my Monotron mod. _________________ JacobWatters.com |
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spectralpimp
Joined: Jul 05, 2013 Posts: 1 Location: germany
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Posted: Sat Jul 06, 2013 10:25 am Post subject:
AD output |
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Can somebody tell me exactly where to wire the AD output of the circuit on the monotron ?
Im new to electronics !
Thanks |
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Cynosure
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Joined: Dec 11, 2010 Posts: 942 Location: Toronto, Ontario - Canada
Audio files: 82
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Posted: Sat Jul 06, 2013 10:42 am Post subject:
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The AD Output goes to the cutoff solder pad. _________________ JacobWatters.com |
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StephenGiles
Joined: Apr 17, 2006 Posts: 502 Location: England
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Posted: Sat Jul 06, 2013 2:17 pm Post subject:
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If this circuit was triggered from a peak follower extracted from a guitar signal, could the peak of the AD output be made proportional to the peak of the trigger - if you see what I mean?
If this were possible, then the AD output would presumably be a ripple free sweep voltage quite independant of the decay of the guitar signal, to control filters/phasers etc.  |
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Cynosure
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Joined: Dec 11, 2010 Posts: 942 Location: Toronto, Ontario - Canada
Audio files: 82
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Posted: Sat Jul 06, 2013 9:26 pm Post subject:
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This won't do that on its own, but maybe if you pass the envelope output through a VCA that is controlled by the output from an envelope follower.
It might be something that is easier to do with a PIC or maybe even an arduino. _________________ JacobWatters.com |
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Starspawn
Joined: Jun 14, 2013 Posts: 84 Location: Oslo
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Posted: Thu Aug 22, 2013 4:48 pm Post subject:
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Hi whats the needed voltage to trigger the 7555 in this circuit?
With the monotron delay it doesnt seem to work (Gate -> circuit -> Cutoff)
The gate drops to 3.7 once I connect the circuit, and to 2.5 on the 324 (on all three +/- and out), which is what I get at the trigger pin as well and then nothing on output.
That seems to be just the positive input there really, the trigger signal drops to a tiny 0.10 DC spike through the 0.1 uf ceramic cap.
Obvious problem?
Like what is the proper capacitor type for 0.1, I dont see why it should block DC at all, yet its not polarized like the other one? |
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