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Sawtooth VCO - help!!!
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elmegil



Joined: Mar 20, 2012
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PostPosted: Tue Oct 08, 2013 5:37 am    Post subject: Reply with quote  Mark this post and the followings unread

That would be my first guess for the expo converter, but not sure whether it would work, having not done it. I tend to overlook things like loading effects so I didn't want to assume it would work.

So at this point I should not be looking at the first schematics you posted? Smile

I think this is probably a case where you will need to build on a breadboard (assuming you have one) and tweak things from there Sad My main concern would be the FET and whether it's fully functional, or the comparator. You might try measuring the signal at the gate of the FET to see what it's doing.

What should happen is that the FET should be pinched off while the cap charges, then the level should get to something that matches the comparator which then opens the FET and drains the cap. With that not working (I would assume) I'd verify the voltages into the comparator are what I expect them to be, and maybe replace the comparator (or at least take it and test it with some other controlled inputs).
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synchroma



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PostPosted: Tue Oct 08, 2013 7:32 pm    Post subject: Reply with quote  Mark this post and the followings unread

Thanks elmegil.

Yes, I updated the schematic and the board design to reflect the original ENS 76 design, and that's when I bought some CA3130 op amps Smile and some FETs Mad

I think my next step is to build test circuits for each component, to find out exactly what parameters I'm working with. I know FETs are notoriously unreliable as to their specs, and I want to be able to test comparators and op-amps too.

I've realised now that I have to build each circuit with regards to the actual parameters of the physical components - an "ideal op amp" approach, or even using the datasheet specs simply will not do.

...but right now I have a 2-day arduino workshop to prepare for starting on Thursday, so it'll probably be the weekend before I get back to tinkering Exclamation
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synchroma



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PostPosted: Tue Nov 05, 2013 3:28 pm    Post subject: New VCO but expos wanting! Reply with quote  Mark this post and the followings unread

So I got really frustrated with the lack of progress I was making, but then I designed my own VCO using a MOSFET instead of a JFET. It works, but my expo seems to stop it working. I'll post some more when I get to the bottom of this, but at least I have a start!


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synchroma



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PostPosted: Fri Nov 08, 2013 6:29 am    Post subject: Reply with quote  Mark this post and the followings unread

Don't know if anyone is following this any more but...

I found the culprit. That is really the last time I buy any ebay purchases from China. I don't know what they are supposed to be, but after building a tester for dual transistors I found neither the LM394 nor the AD2210 chips I bought are in fact, working transistor chips.

So, I finally shelled out for a couple of MAT12s from a reputable UK seller.
£18 a piece. Whew Embarassed

Ed
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elmegil



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PostPosted: Fri Nov 08, 2013 6:53 am    Post subject: Reply with quote  Mark this post and the followings unread

That sucks :/

I was doing some troubleshooting of a circuit with CA3080's a couple weeks back, and couldn't get the darn thing to work on a breadboard. I resorted to testing, and sure enough--every single one of the 25 3080's I bought from EBay/China 18 months ago was bad. Not "it doesn't do anything" bad, but not an OTA, certainly.

I generally won't buy from China unless it's a final resort and the part just is not available anywhere. I did get lucky with a few parts early on, but mostly it's been a bad experience.
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synchroma



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PostPosted: Sat Nov 09, 2013 5:51 pm    Post subject: Reply with quote  Mark this post and the followings unread

Yeah, I seem to have been fairly lucky with My CA3080s so far, but I'm really burnt now with the matched transistors.

I want that vintage sound, but I'm willing to sacrifice that with the view to reliably being able to build circuits. I've started trying to transpose everything to LM13700 chips, but have yet to test the sine shaping circuit I designed yet.

I'm also wondering when to use the buffers on the LM13700 and when not to, when re-designing old circuits.
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synchroma



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PostPosted: Sat Nov 09, 2013 5:54 pm    Post subject: Reply with quote  Mark this post and the followings unread

I think... Of course the darlington in an LM13700 is just a current buffer to lower output impedance, so I'm inclined to think that it's never a bad idea. I notice the OSCar filter uses them for the filter part, but not the resonance/feedback (using an LM13600).

And, I read some vitriol from someone saying that the differential pair input was compromised on the LM13700 when compared to the CA3080, but looking at the schematic for the LM13700 I don't think this is the case. I guess the sine-shaping circuit (adapted from a Thomas Henry CA3080 design) will test this...
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synchroma



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PostPosted: Fri Dec 27, 2013 4:07 pm    Post subject: Reply with quote  Mark this post and the followings unread

OK, once again I am an idiot, but I've been teaching myself about this for a while, and mistakes are only problems to be solved. After reading more of Horowitz and Hill I understand my mistake.

The drain and source of my JFETs were all the wrong way around in the circuits I built. Now I realize that because the op-amp of the integrator is used in an inverting configuration, the output of the op-amp will always be a lower voltage than the input (I think). This may be obvious to some, but I naively thought that it did not matter which was the drain and which was the source. Is this right?

Well, I'm not in full-on work mode as I just got back home from Christmas with my family and two young boys. Looking forward to testing my Ray Wilson core I built. Can the rest of you just put a little D,G,S onto your schematics?

Thanks,
e
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synchroma



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PostPosted: Sun Dec 29, 2013 3:37 pm    Post subject: Reply with quote  Mark this post and the followings unread

UPDATE: after removing and re-fitting the FET in my Ian Fritz sawtooth core, with just the scope probe connected and no exponential converter connected, the output ramps up from 0V to about 4V and then RESETS Smile

It takes about 8 minutes to do this! Time to build a working exponential converter.
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synchroma



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PostPosted: Thu Jan 02, 2014 5:51 pm    Post subject: Reply with quote  Mark this post and the followings unread

Don't know if anyone is still following my journey of failure and then...success! I was right! My FETs were the wrong way around Embarassed BUT... this one works. Thank you Ray Wilson for solving the mystery!


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elmegil



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PostPosted: Thu Jan 02, 2014 6:48 pm    Post subject: Reply with quote  Mark this post and the followings unread

Has anyone explained why the "way around" matters? My understanding of FETs (admittedly not a DEEP one) would lead me to expect it shouldn't matter.
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synchroma



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PostPosted: Thu Jan 02, 2014 7:06 pm    Post subject: Reply with quote  Mark this post and the followings unread

I really don't know, and the topology doesn't give me any clues as it looks completely symmetrical to me and doesn't have any PN or NP junctions int the way of the current path...BUT it's just occurred to me - perhaps the nature of the channel (N, P) dictates this. After all, N-channel has holes to be filled with electrons from a negative charge, and P-channel has spare electrons to be sucked up by a positive charge.

Still don't know. I should probably read this in more detail:
http://www.colorado.edu/physics/phys3330/phys3330_fa11/pdfdocs/AN101FETintro.pdf

I'll admit my ignorance for now. Shocked
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synchroma



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PostPosted: Thu Jan 02, 2014 7:08 pm    Post subject: Reply with quote  Mark this post and the followings unread

PS I think MOSFETS can handle being swapped around. Maybe that's why my MOSFET VCO worked, while my JFET ones didn't. I just etched a board for the MOSFET prototype so I'll report back when it's built and I have some results.
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elmegil



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PostPosted: Thu Jan 02, 2014 8:22 pm    Post subject: Reply with quote  Mark this post and the followings unread

That looks like a great reference, thanks Smile
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gdavis



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PostPosted: Thu Jan 02, 2014 8:24 pm    Post subject: Reply with quote  Mark this post and the followings unread

MOSFETs can't be swapped because of the internal body (substrate) connection. MOSFETs are more like 4 terminal devices but connecting the substrate to the source is so common that the connection is almost always made internally.
If you connect the drain of an N-channel MOSFET to ground and the source to V+, you forward bias the diode between the substrate and the drain.

Apparently most JFETS can be swapped but some can't (don't know why).

_________________
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elmegil



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PostPosted: Thu Jan 02, 2014 8:27 pm    Post subject: Reply with quote  Mark this post and the followings unread

I was just going to post this quote from that "Introduction to FETs" and speculate about enhancement mode vs depletion mode:

Quote:
There are, however, some fundamental performance dif- ferences between MOSFETs and JFETS. JFETs, by na- ture, operate only in the depletion mode. That is, a reverse gate bias depletes, or pinches off the flow of channel cur- rent. A MOSFET, by virtue of its electrically-insulated gate, can be fabricated to perform as either a depletion- mode or enhancement-mode FET. Quite unlike the JFET, a depletion-mode MOSFET will also perform as an en- hancement-mode FET.


I only vaguely remember the terms from my school days 25 years ago, but perhaps this isn't it....
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synchroma



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PostPosted: Thu Jan 02, 2014 8:43 pm    Post subject: Reply with quote  Mark this post and the followings unread

OK, I think I've figured it out...sorta. One hunch that was bugging me earlier - it's the relationship between the gate voltage and the source voltage that dictates whether it's pinched off (or in the ohmic region or whatever) that dictates whether the JFET is open, ohmic, or closed. I'm pretty sure this is due to the PN junction (gate is P-doped silicon) and that's why it works the other way around for P-channel JFETS (although I've never used one).

Study of the CD4016BE analogue switch shows 2 MOSFETS connected symmetrically. I read about this in Horowitz and Hill the other day, and the lightbulb has just lit up on my head Idea

Each FET conducts in the opposite direction to the other one, so you get bi-directional current in a CD4016.

That's all I know! Cool But I'm sure a deeper explanation is possible Question


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synchroma



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PostPosted: Thu Jan 02, 2014 9:07 pm    Post subject: Reply with quote  Mark this post and the followings unread

This looks like a pretty good reference doc also:

http://www.fairchildsemi.com/an/AN/AN-9010.pdf
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synchroma



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PostPosted: Sat Jan 04, 2014 10:49 am    Post subject: Reply with quote  Mark this post and the followings unread

UPDATE: The I got my MOSFET VCO prototype out again - it's still on my breadboard. I was surprised to find out that swapping the MOSFET around stopped it working. Hence the two FETs in the 4016/4066.

Swapping the direction of the JFETs on my Rene Schmitz sawtooth core, and the Ian Fritz, seems to have got them working. For now I'm happy just to know which way around to put a FET in an integrator+reset ramp VCO. couldn't get the Hutchins VCO to work however, but that's OK Smile 2 out of 3 isn't bad.

Now to build some waveshapers! Smile
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elmegil



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PostPosted: Sat Jan 04, 2014 1:55 pm    Post subject: Reply with quote  Mark this post and the followings unread

So which way round is it? Very Happy
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synchroma



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PostPosted: Sat Jan 04, 2014 5:58 pm    Post subject: Reply with quote  Mark this post and the followings unread

Fundamentally like this, for a JFET-based integrator+reset-based ramp generator Very Happy

It didn't help that there was an error in the symbol I downloaded for my PCB software (note to self - always check your layouts against the datasheets) but it was wrong in my head too.


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frijitz



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PostPosted: Sat Jan 04, 2014 9:36 pm    Post subject: Reply with quote  Mark this post and the followings unread

synchroma wrote:
Fundamentally like this, for a JFET-based integrator+reset-based ramp generator Very Happy

You have the JFET backwards on the drawing. What device are you using?

Ian
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synchroma



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PostPosted: Sun Jan 05, 2014 8:22 am    Post subject: Reply with quote  Mark this post and the followings unread

frijitz wrote:

You have the JFET backwards on the drawing. What device are you using?


Really? This is where the mystery deepens in my head.

I'm using the 2N4391.

For me, this has worked for the Rene Schmitz VCO 3 core, and it seems to be working for your core too.

I only noticed this arrangement after I built the Ray Wilson core (with a PN4391): http://www.musicfromouterspace.com/analogsynth_new/VCO20120618REV0/images/vco20120615wsoic_page_1.gif

This is the one in the image posted on 2 Jan (where you can see the oscilloscope trace).
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frijitz



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PostPosted: Sun Jan 05, 2014 10:58 am    Post subject: Reply with quote  Mark this post and the followings unread

synchroma wrote:

Really? This is where the mystery deepens in my head.

Yes, really. No big mystery. If you look at the ENS-76 schematic you will see the FET terminals clearly (and correctly) labeled.

Most JFETs are symmetrical, and it doesn't matter which way they are oriented. That's why their terminals often are not marked on schematics, and why they almost always work the same with either orientation.

Quote:
I only noticed this arrangement after I built the Ray Wilson core (with a PN4391): http://www.musicfromouterspace.com/analogsynth_new/VCO20120618REV0/images/vco20120615wsoic_page_1.gif

Well, you can believe Ray or you can believe me and Bernie. Your choice.

Ian
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synchroma



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PostPosted: Sun Jan 05, 2014 4:09 pm    Post subject: Reply with quote  Mark this post and the followings unread

frijitz wrote:

Yes, really. No big mystery. If you look at the ENS-76 schematic you will see the FET terminals clearly (and correctly) labeled.


Yes I see that. But, at the moment of discharge in Bernie Hutchins' design, "the capacitor voltage is +20 volts (-15 from the comparator, and +5 fed in from the ramp through R12)" (page 2, paragraph 3 from http://www.synthsource.com/ens76/vco2.htm).
Therefore the voltage at the Drain of the JFET is positive +20V relative to the voltage at the Source +5V at the moment of discharge.

As an experiment I tried swapping around the MOSFET I'm using in my own design, connected with the Drain at the input from the Exponential converter. It's an enhancement mode N-Channel MOSFET (2N7000). When I put it the other way around, the circuit stopped working. Of course the gate in my circuit goes from 0V to +15V, rather than -15V to 0V.

I'm not trying to start a fight, just trying to prove that you are both right and trying to figure out why Confused

Ed
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