Old ADSR schematic questions

[Spivkurl]

Hello all!

This is the first thread I have started here. I hope this is the correct forum section to post this, as there is no general DIY section that I found, just related to specific designers. I have been building modules and stand alone synths for quite a few years now. I would normally be asking this on the sdiy mailing list, but am having trouble getting access even though I've been receiving the posts for more than a decade.

I am hoping that someone here can help clarify some elements of this ADSR envelope generator design...

http://yusynth.net/archives/ElectronicDesign/O-Gabor-ADSR-1980.pdf

I am pretty clear on most elements of this design, as there is a decent explanation on the page I linked to. However there are some things left out of the text.

The parts I am most concerned about are P5, Q2, and Q3. They are not explained in the text at all. If anyone can explain to me what P5 should be doing, it would be helpful.

I have a breadboard version of this set up currently, only using more available transistors (have tried 2N3904/06 and BC548/558). Having some trouble with the sustain phase... the sustain will not adjust voltage using P3. Was thinking it had something to do with my confusion over the unexplained parts I mentioned. Also, there seems to be a tendency for P5 to fry.

Any suggestions would be most appreciated.
Thanks,
Pat (Spivkurl)

[blue hell]

[Spivkurl]

Thank you for moving the thread. I sometimes have difficulty adjusting to the different forum setups. Appreciate it!

[gdavis]

P5 looks to me like it would be a trim pot used to set the peak output to the 8V mentioned in the text.

Edit again: I guess Q2 and Q3 are a darlington pair, just a different configuration that I'm not familiar with (wiki says it's a Sziklai pair). Still buffers the output.

[electrotech]

Yes, I agree with the above.

Spivkurl, I don't see how P5 can 'fry' unless you've used the wrong value - it should be 50k.
Are you using a standard 7401 ?
'LS types won't work in this circuit due to the output current requirements.
Also, the supply voltage for the 7401 should be 5V (This isn't shown on the diagram)

Regards,
Andy

Additonal info: OOPS !
Yes, as Jan has noted below, a lot of current will flow if P5 is turned towards the top of it's travel which will cause burn-ups.
I need to study circuits more before posting - sorry.

[blue hell]

P5 would be a trimmer, yes, and should not be set too high up ... as that would cause a lot of current to run through Q3 P5 Q1 - could fry transistors too then. you could add a safety resistor above P5 of maybe 1K or so to limit the max current a bit.

The transistors should not be too critical.

[Spivkurl]

Thank you all for the responses. The note about the supply voltage for the TTL chip is interesting, and explains why the input is referenced to 5V. I guess I'm just trying to learn sequential logic a bit. I have a resistor tied to P5 to limit current, and have still had some problems with magic smoke. I got some feedback about the transistor pair buffer on another forum, and that was what I suspected. It still seems strange that the trimmer to set the 8V for Q1 would be connected to the output buffer... I may need to adjust my thinking and the potentiometer heh. All of the help is valuable, and I will try to keep coming back with results.

[blue hell]

P5 sets the trip point ... when the voltage at the wiper goes over about .6V it make Q1 conduct, which will reset the RS FLIP-FLOP which then in turn will discharge the 2 µF capacitor, causing the output voltage to drop again (so effectively limiting the maximum output voltage to be obtained).

[Spivkurl]

Ah blue hell that makes perfect sense. All of the responses I've gotten here and on another forum have expanded my understanding of the function of different areas of the circuit. Thank you!