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Volt per octave keyboard questions
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Cfish



Joined: Feb 24, 2016
Posts: 477
Location: Indiana

PostPosted: Sat Mar 19, 2016 6:14 am    Post subject: Volt per octave keyboard questions Reply with quote  Mark this post and the followings unread

I have posted a similar thread over in the layout factory and got (tumble weeds)

I am looking for different volt per octave keyboard circuit schematics.

I have built the Ken Stone circuit based on the 74c 922 key matrix IC. But it has a lot of lag

Is this normal for this IC? Or could it be, the generation of IC I have is slower than some?

I have built the old EFM KBD2a circuit but am having some issues with it. Am trying to attach a schematic pic

I get good volt per octave up to the fet but can't get the fet to open.

I used a ca3080 in place of the LM13600 as I don't need the LFO or VCA (second page) of the original schematic. and had them on hand. I corisponded R10 with pin 5 on the OTA. It is unlabeled in the original schematic but seemed logical.
I have triple checked my pinout otherwise.

Will this OTA switch cause problems?

I ordered 2n3819s in, but they came from China and the ohm meater says the pin out isn't correct for that transistor. So I switched to 2n5952 which I had on hand and looked close in the data sheet. ( I could have missed something there).

Am I correct that the drain should be tied to the opamp and source to the glide pot? I have tried it both ways to no avail. The drain and source on fet symbols confuse me.

The music from outer space schematic has a few more bells and whistles than I want to try to weed through if I'm having trouble with the EFM schematic.

I have a grasp on using opamps to get volt per octave, and as a comparator to get a gate signal. When i get to the fet and s and h capicitor it seems like I can't get things to work right

Is the OTA here just acting as a comparator?

Any recommendations are welcome.
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Cfish



Joined: Feb 24, 2016
Posts: 477
Location: Indiana

PostPosted: Sat Mar 19, 2016 8:36 am    Post subject: Reply with quote  Mark this post and the followings unread

As an update I have tried to break this down to things I understand and this is what I came up with.

I used IC1a from the EFM schematic, to give me my 1 volt per octave signal.

(What is the purpose of IC1B in the EFM schematics?)

Then used an op amp as a comparator to produce a gate signal

(Why did the EFM schematic use an OTA here?)

Now I need at least a little sample and hold on key up, so I used the FET cap and final op amp to get what I need.

What I have drawn here works somewhat but I am having FET fits

Have tried a few. Will give a couple of examples

2N7000
The fet does not seem to close fast enough on key release and the capacitor samples on a lower voltage.
If I go from a higher to lower key it's fine. If i go from key press to open it sounds like it samples on 0 volts and slides down.

Seeing key open is when I need it most, that's a wash

J201
Everything is ok on ascending notes but descending notes slide down slowly. Not sure if that's the character of the FET, of if I have my head on backwards

There is a massive cv output shift between different FET types

( can anyone point me at the reason why?)
(Any recommendation of a good FET to try would be appreciated)
(Do my application of drain, source and gate in the drawing look correct?)
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brock



Joined: May 26, 2011
Posts: 112
Location: Canada

PostPosted: Sat Mar 19, 2016 10:29 pm    Post subject: Reply with quote  Mark this post and the followings unread

The one obvious problem I see with the gate driver is there is nothing to drive it high. Try adding 100k across the gate and source of the J201. It probably won't solve all the problems but should help with the FET switching.

Brock
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Cfish



Joined: Feb 24, 2016
Posts: 477
Location: Indiana

PostPosted: Sun Mar 20, 2016 6:20 am    Post subject: Reply with quote  Mark this post and the followings unread

Thanks Brock. The circuit is +- 15 volts and the diode is a 1n914. I assume it's acting like a ziner at that voltage. The gate voltage does go high with this configuration. Adding the typical resistor from gate to source had little affect.
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