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 Forum index » DIY Hardware and Software » Lunettas - circuits inspired by Stanley Lunetta
Pulse ignorer/divider
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IGR



Joined: Aug 31, 2014
Posts: 19
Location: Brno

PostPosted: Thu Sep 06, 2018 4:11 am    Post subject: Pulse ignorer/divider
Subject description: Question.
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Does anyone know how to simply filter out adjustable number of pulses from the clock? For example: first gets through, the second to tenth are ignored, the eleventh passes again, and again and again..I think about monostable with variable pulse lenght and behind it clocked NAND gate.
It is about not to make it complicated, I need four of these circuits.Thanks for your inspiration.
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gabbagabi



Joined: Nov 29, 2008
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PostPosted: Thu Sep 06, 2018 5:16 am    Post subject: Reply with quote  Mark this post and the followings unread

4017?
only Q0 is used for driving futher circuitry?
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IGR



Joined: Aug 31, 2014
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PostPosted: Thu Sep 06, 2018 5:27 am    Post subject: Reply with quote  Mark this post and the followings unread

I wrote it inaccurately, with the word "adjustable" I meant not switchable, simply a pot. I know that the monostable time constant setting is only valid for the actual clock speed, and the division ratio changes as the clock tempo changes.
Something similar see:https://youtu.be/cmVvdpp1QX0
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gabbagabi



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PostPosted: Thu Sep 06, 2018 6:33 am    Post subject: Reply with quote  Mark this post and the followings unread

this is what comes to my mind quickly


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PHOBoS



Joined: Jan 14, 2010
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PostPosted: Thu Sep 06, 2018 7:00 am    Post subject: Re: Pulse ignorer/divider
Subject description: Question.
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IGR wrote:
I think about monostable with variable pulse lenght and behind it clocked NAND gate.

yeah, something like that but probably with a flip/flop instead of a NAND.
Does the pulsewidth of the output signal matter ?

@g.gabba that's a very neat idea and it doesn't need any adjustment if the frequency changes Very Happy
(maybe an extra AND gate at the output or something else so it can produce multiple pulses)

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IGR



Joined: Aug 31, 2014
Posts: 19
Location: Brno

PostPosted: Thu Sep 06, 2018 7:13 am    Post subject: Reply with quote  Mark this post and the followings unread

Pulse length ideally trigger/ ~5ms, but I would get it from the leading edge.
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IGR



Joined: Aug 31, 2014
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Location: Brno

PostPosted: Thu Sep 06, 2018 7:32 am    Post subject: Reply with quote  Mark this post and the followings unread

@g.gabba Elegant solution, thanks. I´ll use one comparator for reseting the counter, to shorten the cycle, maybe better a switch with fixed resistors than pot.
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gabbagabi



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PostPosted: Fri Sep 07, 2018 12:40 pm    Post subject: Reply with quote  Mark this post and the followings unread

dont know if this will work outside my head and the simulation
but a quick breadboard test will not harm the enviroment

the advantage here would be a optical feedback
the idea is: if the steps of the two 4017 are matching, the voltage on the LED on the that step would rise to supply voltage, and the LED would go OFF that moment, cos there is no ground provide from the clocking 4017

for the step-select-clock one could use a rotary encoder with a 4024 in front to get the turning-feeling back Smile


sry for the crude explanation, but u could understand the previous idea, so i guess u can figure out this one as well


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IGR



Joined: Aug 31, 2014
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PostPosted: Sat Sep 08, 2018 1:35 am    Post subject: Reply with quote  Mark this post and the followings unread

Thanks for your engineering exercises. But I wrote Blödsinn, to shorten the cycle I need only binary state of the counter, it is not necessary to go back in the natural numbers. But you are thinking great. I am now obsessed with a pseudo-random sequencer reset. I have a four-step CV 4017 sequencer (outputs 1,3,5,7 reset by AND select of the outputs from the next 4017 which receives the clock from the XNOR gate.) To XNOR go bits 1 and 4 of 4024 with the same clock as the 4-track CV.
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