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johnyradio
Joined: Mar 13, 2014 Posts: 18 Location: San Francisco

Posted: Thu Jan 15, 2015 12:13 pm Post subject:
Number of Bits Needed for Seamless Frequency Sweep? 


hi
how many bits of frequency resolution are needed to achieve smooth, seamless digital FM?
I do not mean frequency modulation in the sense of "FM Synthesis". i just mean setting the frequency with a digital number.
thx! Last edited by johnyradio on Thu Jan 15, 2015 5:13 pm; edited 2 times in total 

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JovianPyx
Joined: Nov 20, 2007 Posts: 1808 Location: West Red Spot, Jupiter
Audio files: 212

Posted: Thu Jan 15, 2015 2:54 pm Post subject:



An interesting question to which I don't have a good answer.
I've done a bit of work with FM in FPGAs and that is where I think an experiment is best performed because the number of bits doesn't depend so much on architecture. In a CPU, you are bound by words of 8, 16, 32 or even 64 bits. An FPGA on the other hand can be programmed to use any number you would want or need, such as 19 or 35.
In the FPGA FM synth I designed, "bits" varied depending on the function. Operator values mostly used 32 bits, but control of the operators went as low as 14 bits. I've used this synth with Lorenz attractor as a modulator. You can hear a drone produced by it here
The Lorenz part requires 64 bit arithmetic. _________________ FPGA, dsPIC and Fatman Synth Stuff
Time flies like a banana. Fruit flies when you're having fun. BTW, Do these genes make my ass look fat? corruptio optimi pessima


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johnyradio
Joined: Mar 13, 2014 Posts: 18 Location: San Francisco

Posted: Thu Jan 15, 2015 2:56 pm Post subject:



lovely drone!
i appreciate your specificity, but i would be fine with an answer restricted to standard wordsizes.
but, wondering if wordsize needed varies, depending on octave and/or binarytofrequency method (linear vs exponential). Last edited by johnyradio on Thu Jan 15, 2015 3:07 pm; edited 2 times in total 

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JovianPyx
Joined: Nov 20, 2007 Posts: 1808 Location: West Red Spot, Jupiter
Audio files: 212

Posted: Thu Jan 15, 2015 3:06 pm Post subject:



In my case, there was no need to change word size depending on pitch or any other parameter.
The drone synth is an 8 operator FM synth with a fixed algorithm of 4 mixed 2 operator FM generators (basically a bell synth).
I've done no FM work with anything but an FPGA, so I really can't speak to what I would do with standard word sizes. I will guess, however, that 32 bit arithmetic is sufficient. Something like a (fast) ARM (with NEON floating point proc) would work nicely in an FM application. It is a 32 bit CPU. In such a CPU, wherever 32 bits is not sufficient, one can always use 64 (or more), but with the standard caveat that extending word size will cost CPU clocks (a fact the is not necessarily present with FPGAs).
One thing to remember about FM is the unpredictability of harmonics generated. Care needs to be taken to avoid audible alias artifacts. As such, high sample rate is your best friend which is why I suggested a fast processor. _________________ FPGA, dsPIC and Fatman Synth Stuff
Time flies like a banana. Fruit flies when you're having fun. BTW, Do these genes make my ass look fat? corruptio optimi pessima


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johnyradio
Joined: Mar 13, 2014 Posts: 18 Location: San Francisco

Posted: Thu Jan 15, 2015 3:09 pm Post subject:



appreciate your tip about sample rate, but i believe that's an unrelated issue to bitsize.
Also, your suggestion "if 32 bits isn't enough, try 64 bits" doesn't really get to the answer of the question.
14 bits is 16,384 steps. So a 14bit linear converter applied to a fullrange of 20 hz to 20 khz would give 1.2 hz per step:
(20,000  20) / 16,384 = ~1.2
That's approx 1 semitone in the lowest octave (NOT enough resolution for a seamless FM) vs approx 1/600th of a semitone in the highest octave (probably way more resolution than needed).
Suggesting that ANY digital frequency controller using a linear algorithm like this is doing it wrong.
i was not suggesting changing wordsize depending on octave, but rather using an exponential algorithm. 

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JovianPyx
Joined: Nov 20, 2007 Posts: 1808 Location: West Red Spot, Jupiter
Audio files: 212

Posted: Thu Jan 15, 2015 3:25 pm Post subject:



johnyradio wrote:  appreciate your tip about sample rate, but i believe that's an unrelated issue to bitsize. 
Bit size is not the only issue over which one needs to make choices, hence I was trying to give a wider scope.
Quote:  Also, your suggestion "if 32 bits isn't enough, try 64 bits" doesn't really get to the answer of the question.
14 bits is 16,384 steps. So a 14bit linear converter applied to a fullrange of 20 hz to 20 khz would give 1.2 hz per step:
(20,000  20) / 16,384 = ~1.2
That's approx 1 semitone in the lowest octave (NOT enough resolution for a seamless FM) vs approx 1/600th of a semitone in the highest octave (probably way more resolution than needed). 
I can't hear much above 14 kHz. As such, I'd not need an instrument that produces 20 kHz fundamentals. In fact, I limit the fundamentals to a much lower frequency than even 14 kHz.
The phase accumulators for the sine generators are 32 bits. I never said they were 14 bits, only that some control values were 14 bits (such as the modulation index). Before deciding on the bit width, the boundaries of the instrument need to be defined, what is the lowest fundamental you want to produce? What is the highest? And then work out the bit width from that. (That is what I did, but I no longer have the scratch paper where I worked that out).
Quote:  Suggesting that ANY digital frequency controller using a linear algorithm like this is doing it wrong. 
That would be your opinion. As you can tell, the system works, so I strongly disagree that it is "wrong".
Quote:  i was not suggesting changing wordsize depending on octave, but rather using an exponential algorithm. 
Then you are way ahead of me. I'll be interested in seeing and hearing your design. _________________ FPGA, dsPIC and Fatman Synth Stuff
Time flies like a banana. Fruit flies when you're having fun. BTW, Do these genes make my ass look fat? corruptio optimi pessima


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johnyradio
Joined: Mar 13, 2014 Posts: 18 Location: San Francisco

Posted: Thu Jan 15, 2015 4:26 pm Post subject:



JovianPyx wrote:  I can't hear much above 14 kHz. As such, I'd not need an instrument that produces 20 kHz fundamentals. In fact, I limit the fundamentals to a much lower frequency than even 14 kHz. 
that's just rough math. Let's call it 10 khz if you prefer. The Hz resolution needed at the top end is still going to be less than the resolution at the bottom end.
Quote:  The phase accumulators for the sine generators are 32 bits. I never said they were 14 bits 
i never said you said they were 14 bits. i never said anything about your phase accumulators. I was using 14 bits as an arbitrary example.
anyway, thanks for mentioning the accumulators, that's a technique to talk about. As i understand, the phase accumulator holds the current address being sampled in your wavetable, correct? And the phase increment register (PIR) holds the constant which gets added to the phase accumulator for each sample the number in the PIR indicates your desired frequency. If it's 32 bits, then i think your 32 bit wordsize will determine your FM resolution.
Re linearity: if your PIR contains the number 1, then you're reading every address in the wavetable, and therefor outputting the lowest possible frequency. For this example, let's say 20 Hz (but will of course depend on your clock rate and wavetable size.)
Ok, then you change your PIR to the number 2. Then you'll be reading every other address in the wavetable, and your output frequency will now be 20 hz X = 40 hz: one octave higher.
Obviously i'm missing something here. How do you get the inbetween notes? Change your clock frequency?
Quote:  Before deciding on the bit width, the boundaries of the instrument need to be defined, what is the lowest fundamental you want to produce? What is the highest? And then work out the bit width from that. 
do you remember your math? The math must make assumptions about minimum wordsize needed per.... something.
Quote:  As you can tell, the system works 
i can't tell, because your sound sample does not contain a simple frequency sweep. When i say FM here, i'm not specifically talking about "FM Synthesis". I mean the general sense of setting the frequency of an oscillator with a number. 

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JovianPyx
Joined: Nov 20, 2007 Posts: 1808 Location: West Red Spot, Jupiter
Audio files: 212

Posted: Thu Jan 15, 2015 6:19 pm Post subject:



Quoting all that is too difficult.
Yes, the frequency resolution of the phase accumulators is 32 bits.
As for the sine table, it holds 4096 samples so it's address bus is only 12 bits. The upper 12 bits of the 32 bit phase accumulator select samples from the table while the lower 20 bits are used for interpolation. The phase accumulator is thus used as an unsigned fixed point binary number in 12.20 format. As such, a PIR value of 0x00000001 would be an extremely low frequency (probably one you would never actually use). In fact, to get each sample (per sample time) the PIR would need to be 0x00100000. Note that this is for my design, you might use a larger sine table or a smaller one, your choice there.
Do I remember my math? I don't understand why you ask that. _________________ FPGA, dsPIC and Fatman Synth Stuff
Time flies like a banana. Fruit flies when you're having fun. BTW, Do these genes make my ass look fat? corruptio optimi pessima


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johnyradio
Joined: Mar 13, 2014 Posts: 18 Location: San Francisco

Posted: Thu Jan 15, 2015 6:26 pm Post subject:



JovianPyx wrote:  a PIR value of 0x00000001 would be an extremely low frequency (probably one you would never actually use). In fact, to get each sample (per sample time) the PIR would need to be 0x00100000. 
You mean your PIR never goes does into the low numbers?
What's the lowest you push it down to?
What's your sample clock rate?
What is the frequency range of your output frequency?
Quote:  Do I remember my math? I don't understand why you ask that. 
Because the math must make assumptions about minimum wordsize needed per.... something.
thx for info Last edited by johnyradio on Thu Jan 15, 2015 6:51 pm; edited 1 time in total 

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JovianPyx
Joined: Nov 20, 2007 Posts: 1808 Location: West Red Spot, Jupiter
Audio files: 212

Posted: Thu Jan 15, 2015 6:49 pm Post subject:



johnyradio wrote:  JovianPyx wrote:  a PIR value of 0x00000001 would be an extremely low frequency (probably one you would never actually use). In fact, to get each sample (per sample time) the PIR would need to be 0x00100000. 
You mean your PIR never goes does into the low numbers?
What's the lowest you push it down to?
What's your sample clock rate?
What is the frequency range of your output frequency?
Quote:  Do I remember my math? I don't understand why you ask that. 
Because the math must make assumptions about minimum wordsize needed per.... something.
thx for info 
Yes, I know how to do math. As I said, I don't have the notes for all of the calculations I did. The math was used to calculate the values in the tuning table based on the sample rate and the size of the phase accumulator. That's easy stuff and it needs to be calculated for each specific application. The exact values I have for my system won't do you much good.
As for these questions:
Quote:  You mean your PIR never goes does into the low numbers? 
Yes, it does. It can and does use values less than 1.00000 if that's what you mean.
Quote:  What's the lowest you push it down to? 
The C that is around 32 hertz
Quote:  What's your sample clock rate? 
65.1 kHz
Quote:  What is the frequency range of your output frequency? 
64 semitones. I will go higher, but that's the limit I put on my system mainly to keep from creating alias artifact problems. I found the pitch range (5 octaves) is sufficient for my uses. YMMV. Last edited by JovianPyx on Thu Jan 15, 2015 6:53 pm; edited 1 time in total 

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johnyradio
Joined: Mar 13, 2014 Posts: 18 Location: San Francisco

Posted: Thu Jan 15, 2015 6:53 pm Post subject:



i'm sure you know how to do math, i'm not suggesting otherwise. will contemplate the numbers you shared.
i may be misunderstanding your PIR scheme, but i believe your architecture would produce a linear frequencyresolution response, so the humanperceived resolution gets better the higher the frequency.
Try this thought experiment:
 say you're reading every address. Your output frequency is X.
 Next, you read every OTHER address. Now your output frequency is 2X, an octave higher. Am i right?
So, that's obviously too coarse of resolution at the bottomend to play semitones. The first jump is an octave. The next just (reading every 3rd address) will be a little less than an octave. The higher you go, the smaller the jumps eventually one jump will be a semitone. Eventually the jumps will get so small that it sounds like a smooth frequency sweep. If we could find out that frequency, it would be a clue to my OP. (clockrate and wavetablelength also come into the equation).
In that scenario, the way to have smooth sweeps is to never play your oscillator too low.
But i may be misunderstanding your PIR scheme, so i need to think about it more. 

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JovianPyx
Joined: Nov 20, 2007 Posts: 1808 Location: West Red Spot, Jupiter
Audio files: 212

Posted: Thu Jan 15, 2015 6:57 pm Post subject:



johnyradio wrote:  i'm sure you know how to do math, i'm not suggesting otherwise. will contemplate the numbers you shared.
i may be misunderstanding your PIR scheme, but i believe your architecture would produce a linear frequencyresolution response, so the humanperceived resolution gets better the higher the frequency.
Try this thought experiment:
 say you're reading every address. Your output frequency is X.
 Next, you read every OTHER address. Now your output frequency is 2X, an octave higher. Am i right? 
Yes.
Quote:  So, that's obviously too coarse of resolution at the bottomend to play semitones. The first jump is an octave. The next just (reading every 3rd address) will be a little less than an octave. The higher you go, the smaller the jumps eventually one jump will be a semitone. Eventually the jumps will get so small that it sounds like a smooth frequency sweep. If we could find out that frequency, it would be a clue to my OP. (clockrate and wavetablelength also come into the equation). 
There is interpolation to consider. PIR values are 32 bits, not 12. So they also contain fraction information which is used by the interpolator.
Quote:  In that scenario, the way to have smooth sweeps is to never play your oscillator too low.
But i may be misunderstanding your PIR scheme, so i need to think about it more. 
Interpolation. That is what keeps if from stepping at low frequencies. It also allows using phase increment values like 1.23728. I use a simple linear interpolator, but there are others that provide curved interpolation (at higher CPU cost). _________________ FPGA, dsPIC and Fatman Synth Stuff
Time flies like a banana. Fruit flies when you're having fun. BTW, Do these genes make my ass look fat? corruptio optimi pessima


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johnyradio
Joined: Mar 13, 2014 Posts: 18 Location: San Francisco

Posted: Fri Jan 16, 2015 11:40 pm Post subject:



Right! Interpolation! Thanks for reminding me of that. You can read every 1.5 addresses, meaning skip 2, then skip 3 twice, then skip 2, then skip 3 twice, etc. (Pseudo?) floatingpoint and your 32bit accumulators make that possible.
Which means there's a slight amount of sine distortion, due to irregular addressing. Whether that's audible would, i think, be a factor of both sample rate and wavetablelength.
I'm thinking that, to get 1 semitone up from the lowest octave, you're doing something like, toggling between reading the entire wavetable and reading the entire wavetable less 1 address. Or even, reading the entire wavetable 19 times, and then reading the entire wavetable less 1 address, one time.
i wonder what kind of distortion that causes. 

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Larva
Joined: Mar 30, 2011 Posts: 6 Location: The Soil

Posted: Sat Jan 17, 2015 3:34 am Post subject:



Interpolation is not a system like skip 2 then skip 3 then skip 2 etc. That describes a variable sample rate which is not desirable in most digital synth applications.
Interpolation is a method that "guesses" what a value ought to be that lies literally between two adjacent known sample points. The word comes from two parts "inter" and "pole" where "pole" means point and "inter" means between.
Let's say you need the "virtual sample" at time position 6.42. It's between known samples at time 6.0 and time 7.0, so you need to get the values for those samples. The unknown sample is 0.42 sample times after time 6.0 and 0.58 before time 7.0. The 0.42 value is kind of like a slider in time and is computed simply as the fraction part of the number that is selecting the virtual sample.
interp = slider * sampleB + (1.0slider) * sampleA
sampleA and sampleB are the amplitude values (not the time) of the two samples used for interpolation.
This is called linear interpolation because all of the virtual samples available lie on a straight line segment drawn between sampleA and sampleB. This turns a sine table into a set of points with line segments drawn between them. This does cause a small amount of distortion, but if the sine table has enough points, the distortion is insignificant.
There are also other types of interpolation that attempt to draw a curve between the two real points, however, these "higher order" interpolation methods are more CPU expensive. 

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johnyradio
Joined: Mar 13, 2014 Posts: 18 Location: San Francisco

Posted: Sat Jan 17, 2015 10:24 am Post subject:



@JovianPyx, correct me if i'm wrong:
pitch of the sinewave is determined by how many addresses are skipped between each read.
getting higher pitches is achieved by skipping more addresses.
lower pitches are achieved by skipping fewer addresses.
Does your DDS system interpolate nonexistent addresses inbetween the existing addresses?
correct? 

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JovianPyx
Joined: Nov 20, 2007 Posts: 1808 Location: West Red Spot, Jupiter
Audio files: 212

Posted: Wed Jan 21, 2015 7:34 am Post subject:



johnyradio wrote:  @JovianPyx, correct me if i'm wrong:
pitch of the sinewave is determined by how many addresses are skipped between each read.
getting higher pitches is achieved by skipping more addresses.
lower pitches are achieved by skipping fewer addresses.
Does your DDS system interpolate nonexistent addresses inbetween the existing addresses?
correct? 
Yes. The idea of interpolation is to create samples that don't exist between the real samples. Note also that the phase increment can be less than 1.00000 such as 0.25921. In that case, you don't "skip" any samples, you might interpolate between the same two real samples several times before moving on to the next set.
I would strongly suggest going to www.dspguide.com and reading the information there about sampling theory. It is well written and completely free. _________________ FPGA, dsPIC and Fatman Synth Stuff
Time flies like a banana. Fruit flies when you're having fun. BTW, Do these genes make my ass look fat? corruptio optimi pessima


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johnyradio
Joined: Mar 13, 2014 Posts: 18 Location: San Francisco

Posted: Wed Jan 21, 2015 8:20 am Post subject:



thx! 

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Electric Druid
Joined: Mar 13, 2012 Posts: 10 Location: UK

Posted: Mon Oct 19, 2015 5:35 pm Post subject:



Although the length of wavetables and interpolation and so forth is all relevant stuff to designing a good digital oscillator, it's not *directly* related to the original question. But I'm late to the party as usual, so you guys have all moved on a bit...
The typical DDS/phase accumulator scheme *does* give a linear response as stated  the minimum frequency increment is a given number of Hertz. The "just noticeable difference" for frequency is usually reckoned as around 6 cents, although obviously some people have a better ear for pitch than others. To keep things smooth and ensure even the most musical people can't complain, let's say we want an oscillator to have steps of 1 cent or less. So how many bits are required for that?
If the lowest frequency we cared about was 20Hz, a frequency one cent higher is:
20 * 2^(1/1200) = 20.0011556
So we need a step size of around 1/1000th of a Hertz.
For a DDS/NCO/phase accumulator, the step size is:
Frequency step = sample rate / max accumulator length
So we can see that our accumulator has to be about a thousand times larger than our sample rate to meet our specification. If we choose a typical sample rate of 48KHz, that'd give us an accumulator length of 48,000,000, which is a 26bit number.
Upping the sample rate to 96KHz would give us 96 million, which is a 27bit number.
So to answer your original question: 24 bits is enough for most jobs. 32 bits is good enough for everything. On an 8bit processor, I use 24 bits. On a 16bit processor, I use 32. _________________ Electric Druid Synth and Pedal DIY website with chips for sale 

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johnyradio
Joined: Mar 13, 2014 Posts: 18 Location: San Francisco

Posted: Sat Jun 03, 2017 1:56 pm Post subject:



Electric Druid wrote:  to answer your original question: 24 bits is enough for most jobs. 32 bits is good enough for everything. On an 8bit processor, I use 24 bits. On a 16bit processor, I use 32. 
many thanks! 

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Grumble
Joined: Nov 23, 2015 Posts: 934 Location: Netherlands
Audio files: 27

Posted: Sat Jun 03, 2017 2:46 pm Post subject:



It might be "mosterd na de maaltijd", but Analog Devices has a nice page where you can play with the various DDS chips.
I use the AD9833 a lot in my diy synth.
You can e.g. change the lsb of the word that sets the frequency and see how much the frequency differs by doing so. 

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