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 Forum index » DIY Hardware and Software » Lunettas - circuits inspired by Stanley Lunetta
Octave transvering puzzzzzzle!
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mike page



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PostPosted: Tue Apr 17, 2018 6:29 am    Post subject: Octave transvering puzzzzzzle! Reply with quote  Mark this post and the followings unread

Heres a little something which might sound cool:

Posted Image, might have been reduced in size. Click Image to view fullscreen.

The puzzle is to make it so you only get one duty cycle per octave pulse like so:

Posted Image, might have been reduced in size. Click Image to view fullscreen.

this example transverses 4 octaves but that is not a critical factor...

I think I have a possible solution but would like to see what you fine folk come up with Smile
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synaesthesia



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PostPosted: Tue Apr 17, 2018 10:44 am    Post subject: Reply with quote  Mark this post and the followings unread

Not sure what you are looking for. Is it some effect similar to an arpeggio going up and down through the octaves? Then your solution is good. I would just feed the three selects to the highest three outputs of the 4016 so you can hear more than a few cycles of each octave frequency.
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PostPosted: Tue Apr 17, 2018 11:45 am    Post subject: Reply with quote  Mark this post and the followings unread

Hey, im after the output in the second drawing. So rather than 16 small pulses follow by 8 twice as big pulses followed by 4 twice as big pulses ... etc ... I was after a configuration that give 1 small pulse, followed by 1 twice as big, followed by 1 twice as big then back down again....
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PostPosted: Tue Apr 17, 2018 11:49 am    Post subject: Reply with quote  Mark this post and the followings unread

And I think Im kind of after a sort of timbral thingy with it rather than arping.
But of course these things are cool and useful to run at audio or event rates!
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PostPosted: Tue Apr 17, 2018 12:30 pm    Post subject: Reply with quote  Mark this post and the followings unread

Maybe have a look at rate multipliers like http://www.ti.com/general/docs/lit/getliterature.tsp?genericPartNumber=cd4089b&fileType=pdf or [ http://www.ti.com/product/CD4089B ] for the top level view.
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PHOBoS



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PostPosted: Tue Apr 17, 2018 7:11 pm    Post subject: Reply with quote  Mark this post and the followings unread

a nice, another puzzle. Very Happy
Here's something that probably won't completely work, but it's a start.

note: U4 is a priority encoder


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mike page



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PostPosted: Wed Apr 18, 2018 9:32 am    Post subject: Reply with quote  Mark this post and the followings unread

This is what I got, but I cant tell if it works or not!

Posted Image, might have been reduced in size. Click Image to view fullscreen.

Last edited by mike page on Wed Apr 18, 2018 11:25 am; edited 1 time in total
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synaesthesia



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PostPosted: Wed Apr 18, 2018 11:01 am    Post subject: Reply with quote  Mark this post and the followings unread

Haven't looked at the output with a scope, but this is how it sounds.


Octave transvering puzzzzzzle!.mp3
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mike page



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PostPosted: Wed Apr 18, 2018 11:14 am    Post subject: Reply with quote  Mark this post and the followings unread

Ha! Cool! Is that the circuit I just posted?

I guess its easy for my circuit to go out of sync so it outputs something else. Therefore, proding the reset on the 2nd part of the 4520 should put out different pulse patterns.

And also might get some freaky peaks adding the ol' steppy triangle XOR trick to it...

Posted Image, might have been reduced in size. Click Image to view fullscreen.

Last edited by mike page on Wed Apr 18, 2018 11:45 am; edited 1 time in total
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PostPosted: Wed Apr 18, 2018 11:39 am    Post subject: Reply with quote  Mark this post and the followings unread

I did a quick simulation with digital works and it works about 50%. I'll have to draw a timing diagram to see what exactly is happening.
Or maybe someone can use some software that does that. I was thinking about the reset too but sofar it doesn't actually seem to
matter. I think it just changes the phase compared to something else running from the same clock, but the pattern stays the same.

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PostPosted: Mon Apr 23, 2018 1:03 am    Post subject: Reply with quote  Mark this post and the followings unread

Any recommendations for software to generating timing diagrams?
I tried doing it on paper but it got confusing pretty quickly!
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PostPosted: Mon Apr 23, 2018 5:36 am    Post subject: Reply with quote  Mark this post and the followings unread

I don't know of any software but I did write down somewhat of a truth table. By the looks of it starts to repeat after a couple of cycles.

Code:
main   mux      division   output
DCBA   CBA
-----------------------------------
0000   000      /1         clk
0001   001      /2          1
0010   010      /4          1
0011   010      /4          1
0100   011      /8          1
0101   011      /8          1
0110   011      /8          1
0111   011      /8          1
1000   100      /16         1
1001   100      /16         1
1010   100      /16         1
1011   100      /16         1
1100   100      /16         1
1101   100      /16         1
1110   100      /16         1
1111   100      /16         1

0000   101      /8          0
0001   101      /8          0
0010   101      /8          0
0011   101      /8          0
0100   101      /8          1
0101   101      /8          1
0110   101      /8          1
0111   101      /8          1
1000   110      /4          0
1001   110      /4          0
1010   110      /4          1
1011   110      /4          1
1100   111      /2          0
1101   111      /2          1
1110   000      /1         clk
1111   001      /2          1

0000   010      /4          0
0001   010      /4          0
0010   010      /4          1
0011   010      /4          1
0100   011      /8          1
0101   011      /8          1
0110   011      /8          1
0111   011      /8          1
1000   100      /16         1
1001   100      /16         1
1010   100      /16         1
1011   100      /16         1
1100   100      /16         1
1101   100      /16         1
1110   100      /16         1
1111   100      /16         1

0000   101      /8          0
0001   101      /8          0
0010   101      /8          0
0011   101      /8          0
0100   101      /8          1
0101   101      /8          1
0110   101      /8          1
0111   101      /8          1
1000   110      /4          0
1001   110      /4          0
1010   110      /4          1
1011   110      /4          1
1100   111      /2          0
1101   111      /2          1
1110   000      /1         clk
1111   001      /2          1

0000   010      /4          0
0001   010      /4          0
0010   010      /4          1
0011   010      /4          1
0100   011      /8          1
0101   011      /8          1
0110   011      /8          1
0111   011      /8          1
1000   100      /16         1
1001   100      /16         1
1010   100      /16         1
1011   100      /16         1
1100   100      /16         1
1101   100      /16         1
1110   100      /16         1
1111   100      /16         1

0000   101      /8          0
0001   101      /8          0
0010   101      /8          0
0011   101      /8          0
0100   101      /8          1
0101   101      /8          1
0110   101      /8          1
0111   101      /8          1
1000   110      /4          0
1001   110      /4          0
1010   110      /4          1
1011   110      /4          1
1100   111      /2          0
1101   111      /2          1
1110   000      /1         clk
1111   001      /2          1

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mike page



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PostPosted: Mon Apr 23, 2018 7:47 am    Post subject: Reply with quote  Mark this post and the followings unread

once again wow, thanks alot! I see what you mean about 50% working, the principal is sort of there but something is wrong. I'll keep staring at it and try and figure out if it is indeed the right approach...
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PostPosted: Mon Apr 23, 2018 12:09 pm    Post subject: Reply with quote  Mark this post and the followings unread

When I initially tried to solve it I first drew up a timing diagram to see which divisions need to be selected and when.
As you can see there is a bit of a problem which is probably releated to why your version doesn't fully work.
This is also the reason why I opted for a 4029 to do the up/down counting.

I did make a mistake in the circuit diagram: there needs to be an inverter between the carry out of the 4029 and the CLK in of the 4013.

if you do that it counts:
0000
up
0001
0010
0011
0100
0101
0110
0111
1000
1001
1010
1011
1100
1101
1110
1111

down
1110
1101
1100
1011
1010
1001
1000
0111
0110
0101
0100
0011
0010
0001
0000


Octave transvering puzzle - timing A.gif
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Last edited by PHOBoS on Mon Apr 23, 2018 3:02 pm; edited 1 time in total
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mike page



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PostPosted: Mon Apr 23, 2018 2:44 pm    Post subject: Reply with quote  Mark this post and the followings unread

Ah nice. Thanks for explaining the way you approached it. Good idea drawing up which divisions are needed etc v smart!
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PostPosted: Tue Apr 24, 2018 2:01 pm    Post subject: Reply with quote  Mark this post and the followings unread

That timing diagram is also how I came up with using a priority encoder.
While I was looked at it I noticed something:
/2 needs to be selected when /4 is high
/4 needs to be selected when /8 is high
/8 needs to be selected when /16 is high
etc.
I assumed CLK (inverted) can be selected when /2 is high but I didn't really check that, hence why I am not sure if the circuit
fully works or not, I also didn't check yet if it still works correct when counting down.

anyway,
/2 is connected to input 1 of the mux so is selected with CBA = 001
/4 is connected to input 2 of the mux so is selected with CBA = 010
/8 is connected to input 3 of the mux so is selected with CBA = 011

looking at the counter that means that when its output is 001x (Q4 = 0, Q3 = 0, Q2 = 1, Q1 = don't care)
the CBA control inputs of the mux need to be 001.
when its output is 01xx CBA inputs need to be 010
when its output is 1xxx CBA inputs need to be 011
and that's exactly what the priority encoder does.

I think it is also possible to chain 2 4029 counters which would give another 4 bits that can be connected to the priority encoder.
Q2 of the encoder can then be connected to input C of the mux.

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PostPosted: Wed Apr 25, 2018 1:34 am    Post subject: Reply with quote  Mark this post and the followings unread

ace! You are the king of logic! props
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