FET reversal question

[Jaba]

Hello everybody

I am no FET expert, but I was used to see the usual FET amp circuit with the gate as a high impedance input, the source toward negative or ground and the drain as the output;
I think it is known as "common source" configuration.

Now I have come to find a number of schematics where the FETs are used in that same configuration as amps or buffers, but upside down, swapping the source and drain pins. Most of the ARP 4023, 4034 and 4035 VCF replicas are examples of this, and the CGS77 Serge VCF too.
I think there is a reason behind it, but I don't know what it is.

I actually tried reversing some FETs in one of my filters, and verified that they can work both ways (at least in this circuit), I did not notice a big difference.

I am sure that I am not the first one to have noted this on this forum, but was not able to find any explanation.

Would anyone please try to explain the reason ?

thank you
Paolo

[Mongo1]

Hi Paolo,

It's been a long time since I studied semiconductor theory, but here's what I remember...

FETs and normal transistors are very different.

A transistor relies on polarized junctions, so everything has to be biased in a certain way for things to work.

An FET is different. The Source-Drain connection is just a conductive channel - there's not really any diode-like behavior there. When voltage shows up on the gate, the 'Field' it forms inhibits current flowing in the channel.

One helpful model is to think of a water hose. The water flows freely unless you pinch the hose together.

Another important difference is that since there is no diode junction from the Gate to the Drain or Source, there will never be any current flowing from the Gate to the other terminals. That results in a super high impedance, which is a very useful thing.

[edit] - I was just doing a little more reading, and there are apparently some FETS where polarity does matter on the S/D connection. I didn't find any details about that, but they apparently do exist.


Gary

[Jaba]

Hi Gary,

thank you for your reply, a bit of theory is always useful.
This is the basis, ok. Maybe we need to go a little further

I'll try to be clearer.
My question actually is: do they have a special reason to specify that a FET should be mounted "reversed" (i.e. drain and source swapped) ?

I had the impression that such reason may exist, I would like to understand it.

thank you

Paolo

[Mongo1]

My question actually is: do they have a special reason to specify that a FET should be mounted "reversed" (i.e. drain and source swapped)

I think we'll have to rely on a bigger brain than mine for that answer
Gary

[Jaba]

Hi Gary,

I see from the edit of your post that you've come to find something confirming my idea.
Thank you for sharing it
I'll try search again; if I find something, I'll report it here.

Paolo

[JovianPyx]

Not a mega-FET-brain here, but I remember reading about FETs and that some are symmetrical and some are not. Those that are symmetrical (and I think that this refers to the gate diode being placed at the center of the drain-source silicon) can have drain and source reversed without any change in the performance of the device. I believe MPF-102 is one of these.

The other type, asymmetrical, cannot have drain and source reversed without changing the performance of the transistor. The sad part is I don't know what exactly happens when drain and source are reversed with these. I'd imagine that the gate impedance is still quite high. It may affect the gain of the device or possibly it's linearity.

[Mongo1]

Thanks Scott -
That makes sense. I saw some reference to the idea that the schematic symbol for a JFET can either have the Gate drawn in the center of the channel, indicating a bidirectional channel, or at one end of the channel, indicating the other kind.

Also - I took a look at the CGS board mentioned in the original post. I think in that case Ken's note is just indicating that he made a boo-boo on the silk screen, not that he's doing anything exotic or weird with the part.

Gary

[Mongo1]

I may have found some answers on this -

http://en.wikipedia.org/wiki/Field-effect_transistor

If I'm reading this correctly, a FET can change modes depending on the degree of voltage you put between Drain and Source. In the 'linear' mode, it says current can flow bidirectionally.

I suspect then that the differences probably occur based on what it takes to put a given FET in linear mode.

But I could be wrong
Gary