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 Forum index » DIY Hardware and Software » Microcontrollers and Programmable Logic
Xarp-56
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JovianPyx



Joined: Nov 20, 2007
Posts: 1988
Location: West Red Spot, Jupiter
Audio files: 224

PostPosted: Sun Nov 16, 2008 11:56 pm    Post subject: Xarp-56 Reply with quote  Mark this post and the followings unread

Here is the Xarp-56 FPGA 56 voice physical model polysynth.

http://home1.gte.net/res0658s/FPGA_synth/Xarp-56.html

The sound clip is a piece of Tchaikovsky's "Dance of the Sugar Plum Fairy" that
I adapted for this instrument - the entire clip is played on one Xarp-56 instrument.

Verilog source is provided if you're interested.

While you listen, remember that this is a single integrated circuit that is doing
the DSP computations to make the sounds you're hearing.

Please enjoy...

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yerpa58



Joined: Mar 08, 2008
Posts: 57
Location: Wisconsin
Audio files: 4

PostPosted: Mon Nov 17, 2008 8:39 pm    Post subject: Reply with quote  Mark this post and the followings unread

Cool sounds! You can hear that it is a little out of tune. Like you said, it is only a few cents here and there, I probably wouldn't notice except for the familiar classical musical selection. A very nice project!
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DrJustice



Joined: Sep 13, 2004
Posts: 2114
Location: Morokulien
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PostPosted: Mon Nov 17, 2008 8:59 pm    Post subject: Reply with quote  Mark this post and the followings unread

Love the idea Scott! Sounds nice too. I haven't examined the code - is it possible to modify it for more precise control over the tuning?

This really begs for a harp style controller... Surprised

DJ
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JovianPyx



Joined: Nov 20, 2007
Posts: 1988
Location: West Red Spot, Jupiter
Audio files: 224

PostPosted: Tue Nov 18, 2008 7:24 am    Post subject: Reply with quote  Mark this post and the followings unread

Someone else pointed out that there are some wrong notes in the piece, I Embarassed really didn't realize that when I posted the mp3, I was really listening much more to the instrument and didn't notice that someone had put a really shabby MIDI file up.

But to answer the question, yes there are methods. One that I've personally used is called a lagrange interpolator which provides a fractional delay between the last and second to last delay segments in a delay line.

I used the same integer lengths delay line method before [PolyDaWG/8] with good results. I had read that human pitch perception with respect to notes relative to each other and in harmony is not that accurate. It seems that the brain accepts 5 cents or less as "in tune". Only the top note of the Xarp-56 is that far out. Most of the notes are much much closer to zero cents.

The problem with Lagrange interpolators is that they like a really high sample rate. I'm not sure if 198 KHz is high enough, I'll have to re-read the stuff I have. I may give them a shot.

I really believe the problem you hear is in the crappy MIDI file in the form of occasional wrong notes and really bad rythm. I will find better copy or I will try a different piece.

The reason I used long delay lines was to avoid the use of fractional delays. At this point, there aren't free multipliers such that I can just add the interpolators. I would have to change the design to allow the multipliers used in the reflection filters to be shared with the interpolators. Not impossible, but it would be a major overhaul of the code.

_________________
FPGA, dsPIC and Fatman Synth Stuff

Time flies like a banana.
Fruit flies when you're having fun.
BTW, Do these genes make my ass look fat?
corruptio optimi pessima
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urbanscallywag



Joined: Nov 30, 2007
Posts: 317
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PostPosted: Thu Nov 20, 2008 11:07 pm    Post subject: Reply with quote  Mark this post and the followings unread

Hey Scott, neat project you have there.

I am interested in your experience with the DSP48 blocks compared with the dedicated multipliers.
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JovianPyx



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Posts: 1988
Location: West Red Spot, Jupiter
Audio files: 224

PostPosted: Fri Nov 21, 2008 6:41 am    Post subject: Reply with quote  Mark this post and the followings unread

urbanscallywag wrote:
I am interested in your experience with the DSP48 blocks compared with the dedicated multipliers.


They seem to infer correctly, at least in this project. 8 were inferred automagically, as 18x18 multipliers.

What I'm not sure of is how to tell exactly what ISE did with them. In the case of this project, they are shared multipliers with registered inputs and unregistered outputs. This would be in the IIR filters at the waveguide refelection point. This particular use doesn't cause the DSP-48 to be used as a MACC. I have another project that might do that (FIR filter), but to be honest, I don't know how to examine what ISE did to ascertain whether a MACC was constructed or not.


EDIT ADD:
I've heard/read that there can be wierd allocation and routing issues in a tight design. I would not call this design "tight". It uses 73 block RAMs and 8 multipliers. So yes, it uses most of the multiplier/block RAM resources. But the logic is simple enough that no more than 17% of any category of slice/CLB resource use is reported. Things like total slice FFs or total slice LUTs, etc. Also, the system clock is running very slow for an FPGA at 38 and change MHz. With a clock that slow, it's pretty easy to make the long period constraints you get.

As for DSP-48 function, I have a great PDF ug431.pdf that I got from Xilinx that shows how the DSP-48 can be used. I just looked, it shows various ways that the DSP-48 can be configured for efficient filters and other processing assemblies. That PDF deserves several complete reads - one of which will happen immediately for me... It shows connection diagrams that should be inferred to instantiate the structure, no source code is given, but you can see what can be accomplished.

Ok, I can see one thing already, I took the easy way out with the FIR filter I did for another design. The FIR filter had to handle 32 samples every DAC enable, about 48 KHz. The design offered 768 clocks per DAC enable, so I made a 511 tap FIR filter that used only one DSP-48... So that one's no big deal either. The FIR filter information in the PDF is much higher performance stuff. I think this FPGA has good potential for synthesizer use. It's definately large enough IMO. Easy to make well over 16 voices of polyphony with high voice complexity.

Sidenote: Yes, WebPACK ISE can have it's problems, but so far, honestly, Embarassed my problems were of my own generation.

_________________
FPGA, dsPIC and Fatman Synth Stuff

Time flies like a banana.
Fruit flies when you're having fun.
BTW, Do these genes make my ass look fat?
corruptio optimi pessima
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