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VCA for gate CV signals
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jsoto



Joined: Oct 14, 2022
Posts: 7
Location: Spain

PostPosted: Fri Oct 14, 2022 10:23 am    Post subject: VCA for gate CV signals
Subject description: Turning on and off an audio signal
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I'm designing a dub siren type of circuit and I'm having trouble figuring out the output stage. I simply want to turn the siren on / off with no volume dynamics whatsoever. I want to use it at gigs, so when it's off I want it to produce as little noise as possible. In previous dub siren designs I've made my approach had been to turn the circuit completely off. In this case, for various reasons, I can't do that. I thought about using an LM13700, but the CV signal is simply a gate and I would only use one of the two VCAs, so it seems overcomplicated and a waste of a very good chip. Reading on this forum I came across a single transistor design, which I have adapted to my circuit (see attachment).

The CV signal is a 0-9V gate and the audio signal is a square wave coming directly from the classic op-amp VCO (0-3.7V approx). The TL072 is powered with a 9V single supply.

It works fine, but when I turn up the gain on my mixer, I can hear some of the audio signal sneaking through. I know it's partly due to capacitive coupling (I'm using a protoboard, which doesn't help), but probably also to a non-negligible leakage current through the transistor (although I wouldn't know how to calculate it). I've thought about simply turning off the op-amps that make up the oscillator, but I don't think that's a good practice. Since I'm not concerned about VCA linearity, just muting/unmuting a signal, I get the feeling that there must be simpler solutions out there, but I'm not able to find them. Maybe you guys can help me.


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PHOBoS



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PostPosted: Fri Oct 14, 2022 1:26 pm    Post subject: Reply with quote  Mark this post and the followings unread

welcome party!

There are several options but something you can try that doesn't add too many components is to use a transistor to pull
the signal to ground. With an NPN transistor (like the 2N3904) you could connect the collector to the connection between
R39 and C22 and the emitter to GND. This would work inverted though so 0V: ON, 9V: OFF. but if that's a problem it would
be possible to use another transistor to invert it. You could also use an analog switch like the 4066 but that adds an extra chip.

If you try to interrupt the signal like you are doing now it is more likely to cause some of the signal to bleed through.
Also if you are using the same 4.5V reference voltage for the VCO then that could be the source of some of the signal to be audible.

Sometimes it can be a bit tricky to get things fully silent.

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jsoto



Joined: Oct 14, 2022
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Location: Spain

PostPosted: Sat Oct 15, 2022 8:23 am    Post subject: Reply with quote  Mark this post and the followings unread

Thank you PHOBoS!

I have tried adding a transistor to pull the signal to ground, but it does not seem to reduce the bleed by any noticeable amount. However, your suggestion has given me the idea of adding another transistor in the same configuration as the one I already had but before the first op-amp (signal goes to the collector, the emitter is connected to the left side of R39, and the CV signal goes to the base trough a 10k resistor). Now the noise is barely noticeable!

The only thing that bothers me about this transistor configuration is that I'm not 100% sure how it works. How do I choose the values? I guess the value of the resistor that goes from the emitter to the inverting input determines the amount of current and so I have to choose the value that gives me the right gain for the inverting amp. As for the base resistor, I guess it has to be small enough so that when 9V are applied to it, the transistor is in saturation, is that correct?

I have never used analog switches, but I am going to learn how they work because they seem very useful. I have tried to look for ICs that only contain one or two switches but there don't seem to be many, and the ones I have found are much more expensive than the 4066. Any recommendations? Also, just out of curiosity (because I think for this particular circuit I'm going to go with the two transistor configuration), would it be better to use a SPST and pull the signal to ground, or use a SPDT and switch between the oscillator signal and ground? Could it be that the SPST lets some signal through (because its resistance is not exactly 0) but the SPDT introduces a clicking or popping noise when switching between signal and ground?
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PHOBoS



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PostPosted: Sun Oct 16, 2022 5:53 am    Post subject: Reply with quote  Mark this post and the followings unread

[quote="jsoto"]Thank you PHOBoS!

Quote:
I have tried adding a transistor to pull the signal to ground, but it does not seem to reduce the bleed by any noticeable amount.

I am curious, what happens if instead of a transistor you just wire it straight to GND does that shut it up ?
If not there is some other path it is leaking through.

Quote:
However, your suggestion has given me the idea of adding another transistor in the same configuration as the one I already had but before the first op-amp (signal goes to the collector, the emitter is connected to the left side of R39, and the CV signal goes to the base trough a 10k resistor). Now the noise is barely noticeable!

great, so it was at least somewhat useful Smile

Quote:
The only thing that bothers me about this transistor configuration is that I'm not 100% sure how it works. How do I choose the values? I guess the value of the resistor that goes from the emitter to the inverting input determines the amount of current and so I have to choose the value that gives me the right gain for the inverting amp. As for the base resistor, I guess it has to be small enough so that when 9V are applied to it, the transistor is in saturation, is that correct?

I struggle with that myself too but to my understanding yes, that is correct.
Of course there is a relation between the base-emitter current and the collector-emitter current. Since you are connecting it to an opamp,
which has a very high input impedance, the collector-emitter current is already very limited so you can probably get away with not using a
resistor on the base. Similar to using a transistor in an emitter follower (aka voltage follower) configuration. Don't take my word for it though.


Quote:
I have never used analog switches, but I am going to learn how they work because they seem very useful. I have tried to look for ICs that only contain one or two switches but there don't seem to be many, and the ones I have found are much more expensive than the 4066. Any recommendations?

I've only used the 4066 (and 4016 which afaik is the precursor to the 4066) but you can also use multiplexers like the 4051/4052/4053.
The 4053 could actually be useful here. It basically has 3 toggle switches so you could use that to toggle the input between signal and GND.
note that switching to 4.5V instead of GND would be better but might create some instability issues.


Quote:
Also, just out of curiosity (because I think for this particular circuit I'm going to go with the two transistor configuration), would it be better to use a SPST and pull the signal to ground, or use a SPDT and switch between the oscillator signal and ground? Could it be that the SPST lets some signal through (because its resistance is not exactly 0) but the SPDT introduces a clicking or popping noise when switching between signal and ground?

Not sure if one of them is better than the other, but pulling the signal to GND would have a higher current draw so for battery operated it is
probably the lesser of the two. The popping noise is likely the result of bad biasing. It might help if you switch to 4.5V instead of GND but
as I mentioned that might create some instability issues. Completely eliminating any popping noises is tricky as you would either have to
switch at exactly the right moment when the signal is at 0V (assuming the input was switched to GND before) or you need a slower transition
which will lead you to a VCA (can be done with a transistor but requires some experimentation).

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zaphod betamax



Joined: Nov 27, 2020
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PostPosted: Sun Oct 16, 2022 7:14 am    Post subject: Reply with quote  Mark this post and the followings unread

Any way to just gate the generation of the oscillator?
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jsoto



Joined: Oct 14, 2022
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PostPosted: Sun Oct 16, 2022 4:06 pm    Post subject: Reply with quote  Mark this post and the followings unread

Quote:
I am curious, what happens if instead of a transistor you just wire it straight to GND does that shut it up ?


I tested it again and you were absolutely right, adding a transistor to pull the signal to ground makes it shut up as much (or even more) as the solution I came up with yesterday. When I tested it I was putting 0V on the base of the transistor instead of 9V (even though you had carefully pointed out that it worked inverted). I'm sorry about that!

The only downside to that approach is that I would need another transistor to invert the CV signal, but it might be the most elegant solution.

Quote:
I struggle with that myself too but to my understanding yes, that is correct.
Of course there is a relation between the base-emitter current and the collector-emitter current. Since you are connecting it to an opamp,
which has a very high input impedance, the collector-emitter current is already very limited so you can probably get away with not using a
resistor on the base. Similar to using a transistor in an emitter follower (aka voltage follower) configuration. Don't take my word for it though.


Ok, I wasn't that far off then. I'll try removing the base resistor and see what happens, anything that saves on components and PCB space is welcome!

Quote:
I've only used the 4066 (and 4016 which afaik is the precursor to the 4066) but you can also use multiplexers like the 4051/4052/4053.
The 4053 could actually be useful here. It basically has 3 toggle switches so you could use that to toggle the input between signal and GND.
note that switching to 4.5V instead of GND would be better but might create some instability issues.


I hadn't seen the 405x series, thanks for bringing it up! They are just as cheap as the 4066, which is great. The only problem is that they take up a lot of space (14-16 pins). With the 4053, I would only use one of the 3 switches it comes with. Still, I think I'm going to buy a few analog switches / multiplexers and test with them. I found the TS5A3159 which is not very expensive and only has 6 pins, so it might be the perfect option.

Quote:
Not sure if one of them is better than the other, but pulling the signal to GND would have a higher current draw so for battery operated it is
probably the lesser of the two. The popping noise is likely the result of bad biasing. It might help if you switch to 4.5V instead of GND but
as I mentioned that might create some instability issues. Completely eliminating any popping noises is tricky as you would either have to
switch at exactly the right moment when the signal is at 0V (assuming the input was switched to GND before) or you need a slower transition
which will lead you to a VCA (can be done with a transistor but requires some experimentation).


What do you mean by instability problems? Is it because the 4.5V reference is less stable than ground? As for now, the 4.5V reference is done with a voltage divider (10k resistors and a 47u capacitor) which is directly connected to the two non-inverting inputs of the TL072. As the non-inverting inputs have very high impedance I understand that there is no need to buffer the 4.5V reference voltage. In case of using an analog switch and switching from signal to 4.5V, would it be enough to buffer the reference voltage to give it enough stability?

Quote:
Any way to just gate the generation of the oscillator?


Hi zaphod! That's what I considered at first, and I could only think of two options, either cut the power supply of the LM358 that makes up the oscillator (it's the classic oscillator that comes in the datasheet of that op-amp) or somehow prevent it from oscillating (making the CV voltage 0v, for example, or adding a comparator that takes the triangular signal and making Vref=0v to stop the oscillation). I get the feeling that in both cases these are not good practices, but I could be wrong.
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zaphod betamax



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PostPosted: Sun Oct 16, 2022 5:26 pm    Post subject: Reply with quote  Mark this post and the followings unread

Why not use a 2N7000 Mosfet instead of the transistor,
the off resistance is super high, and the on resistance really low.

Also, are you bypassing the virtual voltages to ground?
This can really cut down on hash and bleedthrough.
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jsoto



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PostPosted: Mon Oct 17, 2022 9:56 am    Post subject: Reply with quote  Mark this post and the followings unread

Quote:
Why not use a 2N7000 Mosfet instead of the transistor,
the off resistance is super high, and the on resistance really low.


I've never had the opportunity to use mosfet transistors, so this may be the perfect occasion to learn about them! If the off resistance is very high, probably replacing the npn I had with a mosfet will be enough, and I won't have to add any other components to reduce the bleed through. I don't have any lying around, but I will go to my local store and buy an assortment of mosfet transistors and also analog switches / multiplexers for testing.

Quote:
Also, are you bypassing the virtual voltages to ground?
This can really cut down on hash and bleedthrough.


Yes, for 9v and 5v I use linear voltage regulators with several bypass capacitors (100-47uf and 100nf, because these are the values I usually find in other designs) and for the reference voltages (2.5v and 4.5v) I also use bypass capacitors (47uf, although I could probably use smaller capacitors).

Since we are addressing this topic, what is the criterion for choosing the value of the bypass capacitors? My understanding is that for reference voltages, the voltage divider (I use 10k resistors) together with the bypass capacitor should form a low pass filter with low enough cut-off frequency (in my case 0.7 Hz). But, as I won't have impedance problems because the reference voltages are connected to non-inverting inputs of op-amps, I guess I could use larger resistors (100k) and smaller capacitors (4.7uf) to save space, right? I also use 100nf bypass capacitors between the supply pins of the ICs. As I am going to use SMD components maybe it is better to use 1uf ceramic capacitors?

Sorry to divert the conversation, but it's a topic very interesting to me as well!
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zaphod betamax



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PostPosted: Mon Oct 17, 2022 7:08 pm    Post subject: Reply with quote  Mark this post and the followings unread

I do quite a bit of single sides power. Right now I am running +5V single supply.

Generally I use common values to bias the non-inverting op amp input.
10k 5% from Vdd to NI input, and 10k 5% from NI input to chassis ground.

10uF is usually enough to for from NI input to chassis ground.

Of course I experiment with values to see what yields the best results.





jsoto wrote:
Quote:
Why not use a 2N7000 Mosfet instead of the transistor,
the off resistance is super high, and the on resistance really low.


I've never had the opportunity to use mosfet transistors, so this may be the perfect occasion to learn about them! If the off resistance is very high, probably replacing the npn I had with a mosfet will be enough, and I won't have to add any other components to reduce the bleed through. I don't have any lying around, but I will go to my local store and buy an assortment of mosfet transistors and also analog switches / multiplexers for testing.

Quote:
Also, are you bypassing the virtual voltages to ground?
This can really cut down on hash and bleedthrough.


Yes, for 9v and 5v I use linear voltage regulators with several bypass capacitors (100-47uf and 100nf, because these are the values I usually find in other designs) and for the reference voltages (2.5v and 4.5v) I also use bypass capacitors (47uf, although I could probably use smaller capacitors).

Since we are addressing this topic, what is the criterion for choosing the value of the bypass capacitors? My understanding is that for reference voltages, the voltage divider (I use 10k resistors) together with the bypass capacitor should form a low pass filter with low enough cut-off frequency (in my case 0.7 Hz). But, as I won't have impedance problems because the reference voltages are connected to non-inverting inputs of op-amps, I guess I could use larger resistors (100k) and smaller capacitors (4.7uf) to save space, right? I also use 100nf bypass capacitors between the supply pins of the ICs. As I am going to use SMD components maybe it is better to use 1uf ceramic capacitors?

Sorry to divert the conversation, but it's a topic very interesting to me as well!
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jsoto



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PostPosted: Wed Oct 19, 2022 10:28 am    Post subject: Reply with quote  Mark this post and the followings unread

Quote:
10uF is usually enough to for from NI input to chassis ground.


I will try 10uf capacitors and see if I notice any increase in noise. Thanks!
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DES



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PostPosted: Wed Oct 26, 2022 10:05 am    Post subject: Reply with quote  Mark this post and the followings unread

Quite a few synths use FETs on their outputs to mute the audio outputs to keep the turn-on ‘thump’ from going out to your mixer/speakers. Might want to check some manufacturer schematics to see how they implemented them.
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Sven



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PostPosted: Wed Oct 26, 2022 9:28 pm    Post subject: Reply with quote  Mark this post and the followings unread

The MFOS Noise Toaster has a JFET VCA http://musicfromouterspace.com/forums.html?MAINTAB=SYNTHDIY&PROJARG=NOISETOASTER/NOISETOASTER.php&VPW=1306&VPH=774
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jsoto



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PostPosted: Thu Nov 10, 2022 5:40 pm    Post subject: Reply with quote  Mark this post and the followings unread

I have been learning about JFETs and experimenting with them. After a few tests, I came up with a design almost identical to the MFOS Noise Toaster. Later on, doing a bit more research, I found out that it is also the same circuit they used in some Boss and Ibanez pedals for bypass switching.

At first I tried to use only one JFET (Q2), but I couldn't get enough attenuation. I measured an off-output (SW1 open) of about 4mV, which corresponds to an attenuation of 60dB (the on-output is ~4V peak-to-peak). After making some more measurements while removing and putting back different components I think I managed to isolate the EMF noise, which turns out to be about 2mV (I'm using a protoboard for the moment). So the actual attenuation with only one JFET would be about 66dB (2mV/4V). After adding the second JFET (Q1) I measured an off-output of ~2mV, which would mean that the actual attenuated signal (without taking into account EMF noise) is below 100uV or so, corresponding to an attenuation of at least 90dB. I've also tried listening to the noise while removing and putting back Q1 and I can't tell difference, so all the noise I hear is indeed generated by EMF. Nice!

I would like to try to explain how the muting circuit works, to see if I understand it correctly. Both JFETs work in the same way, so the explanation should be valid for both Q1 and Q2.

The source is always connected to 4.5V but, if I'm not mistaken, the source is also always the lower voltage terminal, regardless of the actual physical pin of the transistor. In that case, the JFET can be turned off by connecting its gate to ground, as the source sits always at ~2.5V (the signal is a square wave), assuming Vgs(off) > -2.5V. Here comes my first question, if Vgs(off) is so determinant, how do people live with so much variability (the datasheet of the 2N5457 says Vgs(off) is between -0.5V and -6V)? Do you always have to aim for the worst case scenario? In my case that would mean connecting the JFET's base to -3.5V to turn it off, and I don't have negative voltages...

Then, when the transistor is on, Vds is only a few mV (the "resistance" is very low), so the source sits at ~4.5V and 4.5V can be applied to the base to fully turn on the transistor (Vgs = 0V). The nice thing about it being very few mV is that Vds stays in the linear region so distortion is minimal. However, I remember reading somewhere that the slope for positive and negative Vds is not the exactly same, which introduces distortion. If the source is always the lower voltage terminal, how can you have negative Vgs? It is not clear to me...

All the stuff going on before the gate terminals is simply there to get a smooth on/off and minimize pops and clicks. Capacitor C3 charges through R3 and discharges through R3+R2. Resistor R5 forms a voltage divider with R3 to get 4.5v. The diode ensures that 4.5V is never exceeded at the transistor gate. I've read that having Vgs>0V could damage the JFET. Anyway, being a closed environment, I suppose I could do without one of the two (R6 or the diode).

I also tried using the 2N7000 (in the same configuration, but changing the gate signal circuit, since it needs Vgs > +2V to turn on), but I coudn't get it to turn off completly. Even when I disconnected it or connected directly to ground there still was an absurd amount of bleed through. What am I doing wrong? I'm interested in using MOSFETs instead of JFETs because they seem much easier to get. I also tried to pull the signal to ground using a JFET (p-channel, to turn it off at 4.5V and turn it on at 0V) between R1 and C1, but I got almost no attenuation. I also thought about using a BJT to pull the signal to ground, but I would need to invert the signal and apparently if the base of the transistor is not totally disconnected it introduces distortion (https://sound-au.com/project147.htm). Maybe my solution is the simplest, what do you guys think?


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Sven



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PostPosted: Sat Nov 12, 2022 9:55 am    Post subject: Reply with quote  Mark this post and the followings unread

jsoto wrote:

I also tried using the 2N7000 (in the same configuration, but changing the gate signal circuit, since it needs Vgs > +2V to turn on), but I coudn't get it to turn off completly. Even when I disconnected it or connected directly to ground there still was an absurd amount of bleed through. What am I doing wrong?


Dave Jones from the EEVBlog would say:" Trap for young players." Wink

The reason is that Mosfets usually have a internal Diode (bodydiode) between drain and source. They often don't appear in schematics but always in the datasheet. If you look at a 2N7000 datasheet you will see it. I also attached a screenshot from the ST Electronics 2N7000 datasheet.


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PostPosted: Sat Nov 12, 2022 10:06 am    Post subject: Reply with quote  Mark this post and the followings unread

I would try 2 Mosfets in series with either the Drains or the Sources connected together.
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jsoto



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PostPosted: Sat Nov 12, 2022 12:01 pm    Post subject: Reply with quote  Mark this post and the followings unread

Ah, I see, didn't know about the internal diode, thanks for bringing it up! So I would need two MOSFETs for each muting stage right? And I guess both gates have to be connected to the same control signal to turn them on and off? Do MOSFETs have any advantage besides their availability and cost for this particular application?

Quote:
Both JFETs work in the same way, so the explanation should be valid for both Q1 and Q2.


Regarding my previous post, I realized that I was wrong when I said that both JFETs worked exactly the same. In the case of Q1, the input signal is not centered around 4.5V (signal before R1 is 0V-4V square wave), so I guess that I would be better off biasing it by connecting 4.5V through a 1M resistor (for example) to the drain, right?. Right now my 4.5V reference voltage is not buffered, because I only use it at the non-inverting inputs of the op-amps. Would I need to buffer it to bias the input of Q1? Also, regarding the JFET selection, which parameters other than Vgs(off) do I need to look at to get a good attenuation?
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Sven



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PostPosted: Mon Nov 14, 2022 8:49 am    Post subject: Reply with quote  Mark this post and the followings unread

jsoto wrote:
So I would need two MOSFETs for each muting stage right? And I guess both gates have to be connected to the same control signal to turn them on and off?


That is what I would try as suggested with the gates tied together. I haven't tried this but I think it will work

jsoto wrote:
Do MOSFETs have any advantage besides their availability and cost for this particular application?


I don't think so.

Quote:
Regarding my previous post, I realized that I was wrong when I said that both JFETs worked exactly the same. In the case of Q1, the input signal is not centered around 4.5V (signal before R1 is 0V-4V square wave), so I guess that I would be better off biasing it by connecting 4.5V through a 1M resistor (for example) to the drain, right?. Right now my 4.5V reference voltage is not buffered, because I only use it at the non-inverting inputs of the op-amps. Would I need to buffer it to bias the input of Q1? Also, regarding the JFET selection, which parameters other than Vgs(off) do I need to look at to get a good attenuation?


I can't answer to that, sorry. There are some papers online you can find them if you search for "JFET as variable resistor" they may answer some of your questions.
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