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Designing a Sawtooth VCO
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synthjakk



Joined: Feb 12, 2018
Posts: 20
Location: UK

PostPosted: Thu Feb 15, 2018 9:33 am    Post subject:  Designing a Sawtooth VCO
Subject description: Designing a Sawtooth VCO from scratch, error with Multisim
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I am currently trying to design my own Analogue synthesiser, to better understand the theory behind each stage. I am working on a sawtooth VCO at the moment and seem to be having problems with the Multisim simulation. Any ideas why I am not outputting the correct sawtooth? The input will be from an exponential converter


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electrotech



Joined: Apr 24, 2013
Posts: 38
Location: Ayrshire Scotland

PostPosted: Thu Feb 15, 2018 12:17 pm    Post subject: Reply with quote  Mark this post and the followings unread

Hello synthjakk,

Welcome to the forum !
Good idea to test circuits using a simulator but sometimes it can be tricky to get them working as you'd expect.
Firstly, you need to get rid of that function generator you've got connected to the input - this is supposed to be an oscillator after all and feeding a 10kHz square wave into it doesn't help...
I tried your circuit on an old version of Electronics Workbench I've got (see attached picture) and I managed to get your circuit working with a few changes.
The supply voltages I increased to +-9V as +-5V is right on the lower limit of operation for a 741. Also didn't know the cut-off voltage for the default JFET.
The reference voltage at the comparator V5 is made positive not negative as you've got.
I also changed the JFET to an actual J112 or J113 model - I've never had much success with the default one.
The input (for testing) is from a potentiometer across the negative supply then turned into a current via a 47k resistor to the inverting input of V2. 1K is far too small a value here.
Played about with some resistor values as well for reliable simulation.
I haven't built this so can't say whether it's would work or not, that's up to you to find out.
Good luck with your experiments.

Andy


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synthjakk



Joined: Feb 12, 2018
Posts: 20
Location: UK

PostPosted: Thu Feb 15, 2018 1:57 pm    Post subject: Reply with quote  Mark this post and the followings unread

I have drawn your design to see if I can make that run in Multisim first, before analysing the errors of my own. What 9V input sources did you use? I cant seem to get past the simulation error with this circuit. Any ideas what might be causing it? Thank you for your response, very useful !!!!! I'll post all the progress that I make on here if it's of use to anyone Smile


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gabbagabi



Joined: Nov 29, 2008
Posts: 651
Location: Berlin by n8
Audio files: 23

PostPosted: Sun Feb 18, 2018 12:33 am    Post subject: Reply with quote  Mark this post and the followings unread

Hi,

what i always do:
- use only single OPamps (eg TL071) cos it is easyer to just copy them if u need one more opamp in ur simu

- under "Power Sources" u find five "V_REF", u can freely configure them (in terms of Name and Voltage) i would use them as power supply - so u get rid of the Battery
--> u could also use VCC VDD VSS and VEE, but some of them are internally tied to CMOS and TTL,
so by using the VREF u avoid confusion when u start to simulate mixed signal circuits

- never use polarised caps they causing simulation errors
- switches also causing simulation errors --> instead i often a POT with 50MOhm and steping set to 100%

- one day ur circuits will grow and u need more space --> press CTRL-M and there u can make more space (it took me years to find this out Smile )

cheers


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