dspic VCDO

[waterbuffalo18]

i built a new module a VCDO programmed in a dspic w/16bit ADC. exp conversion is done with a lookup table. 24bit tuning word and a 32bit phase accumulator. it does FM, sync, and triangle output. the normal waveforms are provided with analog waveshapers. i'm especially happy with the sine shaper which uses the OTA with feedback method. it tracks 1v/oct very closely. i also added a linear fine frequency offset added after the expo conversion to set constant beating but i've only built one of these so far. aliasing is not an issue since i sample at 500KHz and have a 2nd order (100khz fc) at the output. really the only issue i have is that it is a power hog. it uses 120mA off the +15v supply. most of that is the dspic since it runs at 120MHz.

http://www.homebuilthardware.com/forums.html/projects/dspicvcdo/

-Ryan

[okvern]

Hi Ryan,

That's really cool. Did you do the surface mount soldering yourself? I've only done a tiny bit of that, and it scares the heck out of me every time. It's my shaky old fingers and failing eyesight...

I was also surprised by the price of the chip--under $5 in smaller quantities. I had previously written off the dsPIC line because they seemed to expensive--thanks for making me take another look!

On your web page, you wrote: "The dspic requires 4 clock cycles for the fastest instructions and I don’t think I’m using the dsp instructions enough to use a dspic."

I sort of wondered about that--but, as you say, it seems like a good base project for getting into the dsPIC world.

I see that the DSPIC30F3013 is available in an SDIP package--would you mind if I created a board for that version? (At some point--it's probably not something I'll get to right away.)

Thanks,

Ole

[waterbuffalo18]

hi and thanks,

yes, i solder the surface mount stuff myself. it is something that just requires a little practice and proper technique. i'm a bit shaky myself actually (but not old). I think most people will find the larger smd packages are really easy to handle once you try it a few times. the hard ones are chips like the ADC and smaller. these have 0.65mm spacing between pins. you wont' find that chip in DIP format.

I don't mind if you make your own layout but you'd have to find another ADC to use. even if you wanted to build like it is, i'd reccomend to use a cheaper ADC (LTC1609) but i got the max1132 as samples.

the comment about clocks / instruction. the dspic doesn't have many MIPS per MHZ which is saying the same thing. this is why it clocks at 120MHz. i only needed that speed to get the high sample rates for input and output.

updates: i've had some conversations about power with people from the synth-diy list. if a revision was made, power consumption should be reduced. If not, at least drop the input voltage of the regulator to something like 10V to reduce heat. i'm considering a new processor. the NXP ARM which is much lower power, but this is SMD and tight pitch.

[State Machine]

Hi,

Just wondering. With a tune word width of 24 bits, accumulator width of 32 bits, and sample rate of 0.5 MHz. The core, top end, frequency is approximately 1950 HZ. I hear in your sample what appears to me much higher top end. What method are you using to achieve this? I was also thinking that you probably can add AM modulation very easily by utilizing the hardware multiplier in the DSPic and sharing your outboard A/D with an input for AM. Since it seems you are oversampling that chip anyways, you can use it for more than just setting of the desired frequency.

I find that doing experimentation with DCO's, partitioning what function the MCU serves (firmware duties) and what gets implemented in hardware is a critical one. I find, personally, that the MCU best handles the computation/control/data movement end of things while the DCO core hardware is implemented within an FPGA. One can also embed a soft core MCU into the FPGA and use this as the controller and then create multiple DCO instances in the FPGA. These, of course, are my personal preferences based on my own prototypes but do like your approach very much using the DSPic. I have wanted to do that myself and thus am not minimizing your approach at all . Anyhow, since the MCU is now not involved in the process of doing the math for the DCO, much higher sample rates are now attainable and thus upper end frequency, not to mention a more flexable DCO that can do agile phase modulation, amplitude modulation, frequency shift keying, etc .... If the FPGA is large enough, you can your implement wavetables right in the FPGA itself, maybe even the expo conversion.

I do like the approach of doing the waveshaping and filtering, etc ... using external analog circuitry. A sort of Hybrid DCO. This, of course, is nothing new. I just like to see for myself how to design such circuits or see how others do this sort of stuff.

Oh, so many ways to skin a cat

Bill

[waterbuffalo18]

the tuning word table is 24bit. it only covers 1 octave. the actual calculated tuning word is the table value multiplied by powers of 2 to get the octave. this multiplication result has more bits. i have the frequency limited to something like 2048hz i think.

i'd really like to do something like this on an FPGA but so far, i haven't done much with them. my complaint is that there are no low pin count packages to play with.

[State Machine]