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 Forum index » DIY Hardware and Software » Microcontrollers and Programmable Logic
Phaser and other effect ideas
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VA1



Joined: Aug 20, 2018
Posts: 98
Location: Nederland

PostPosted: Wed Aug 29, 2018 4:03 am    Post subject: Phaser and other effect ideas
Subject description: phaser distortion effects
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Hi, i like to have some ideas for digital effects.

I am searching for effects like : phaser, distortion and small delay effects like chorus to add in my synth project.

What is the idea behind a phaser ?,
there are many phaser sounds out there, what is the difference ?
It should be simple enough to program for me once i have the idea.

And how do you make a warm sounding distortion the digital way ?, maybe impossible ?

And why is my chorus noisey ?,
what is the idea behind a warm sounding chorus without crackling sound on some lower waveforms ?

What effects am i missing more ?, just looking to add something, there is space enough, no RAM for very long delays.
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JovianPyx



Joined: Nov 20, 2007
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PostPosted: Wed Aug 29, 2018 8:15 am    Post subject: Reply with quote  Mark this post and the followings unread

I have done digital chorus several times and it is noise free.

In order to help you with such things, we would need to see your source code. There are many different ways that noise could appear in the chorus that does not originate in the source signal. All of these would involve some implementation error which is why seeing the source code is necessary.

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VA1



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PostPosted: Wed Aug 29, 2018 9:19 am    Post subject: Reply with quote  Mark this post and the followings unread

See attatchment for code


chorus.txt
 Description:

Download
 Filename:  chorus.txt
 Filesize:  1.74 KB
 Downloaded:  338 Time(s)

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VA1



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PostPosted: Wed Aug 29, 2018 9:44 am    Post subject: Reply with quote  Mark this post and the followings unread

I tryd everything for interpolation, i dont know why i get weird results.
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JovianPyx



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PostPosted: Wed Aug 29, 2018 9:59 am    Post subject: Reply with quote  Mark this post and the followings unread

Immediately apparent is that you're not using fractional sampling. Your chorus algorithm is thus quantizing down to single samples from the delay line.

A better way might be to consider the LFO as a fractional pointer into the delay line.

With fixed point, this is a bit tricky because the "pointer" into the delay line is not an integer, but rather something like fixed point 4.12 (this gives 1 bit for sign, 3 bits for mantissa and 12 bits for the fraction). This would be appropriate for a delay line that is 16 locations long. It could also be done with 3 bytes where the highest byte is the integer and sign portion of the fixed point number and the low 16 bits is the fraction. That gives better resolution and access to a larger delay line.

To calculate the value from the delay line, the pointer is used to access 2 contiguous delay line locations. Say the "pointer" value is 5.7. The locations of interest are del[5] and del[6] and the actual location is 70% of the way between del[5] and del[6]. Those are accessed and then linear interpolated by the fraction part (0.7). The delay line output in this case is then
Code:
del[5] * 0.3 + del[6] * 0.7
This can also be expressed as
Code:
del[5] * (1.0-0.7) + del[6] * 0.7
There are also other algebraic ways to express this. Obviously this will consume more CPU clocks than your current implementation. This is the issue I see at the forefront, there may be others. But first, I'd implement fractional sampling with linear interpolation which I described above.
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VA1



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PostPosted: Wed Aug 29, 2018 10:17 am    Post subject: Reply with quote  Mark this post and the followings unread

Yes i know i need interpolation, i sped yesterday trying, i cant get it to work.
I tryd interpolating with the LFO shifted off bits.
So i have 7 bits wich i shift to gone, then multiply the current read by that
then multiply the next position by 128-value;

I got some weird loud noise.
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JovianPyx



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PostPosted: Wed Aug 29, 2018 10:34 am    Post subject: Reply with quote  Mark this post and the followings unread

I can say that interpolation does work, even in fixed point. Something is wrong with your implementation.

I don't know how far you are trying to move the pitch of the input signal, but chorus doesn't need much. Also remember that when the chorus is "speeding the signal up" (or slowing it), it is really altering the effective sample rate. This can affect aliasing. Also be careful to properly handle the wrap at the ends of the delay line.

One of the things I do often is to test implementations using my PC. I write a C implementation that generates a .wav file so I can listen as well as see the waveform using Audacity. When I've wanted to do something like a chorus effect, I write the program to use single precision floating point. That is a starting point. I make that work perfectly, and then translate the algorithm from float to fixed point. Once working in the PC it's easy to port to something like a dsPIC.

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VA1



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PostPosted: Thu Aug 30, 2018 3:26 am    Post subject: Reply with quote  Mark this post and the followings unread

Thanks, i fixed it.
Only it cost to much CPU for the extra read + interpolation.

The sound is good now, a little bit metal like sound, no crackling.
This chorus is really pushing the limits,
you can hear the DAC is resetting to centerpoint sometimes.
Also i hangs when there is no time for other interrupts/main loop.

I had a small problem with different code wich set the effect filter output to zero to avoid IIR noises.
Normally with floats i denormal them, here its different with integers.
So its 14 bit interpolated now.

Now i really need some small ASM that has better results somewhere.
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JovianPyx



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PostPosted: Thu Aug 30, 2018 5:19 am    Post subject: Reply with quote  Mark this post and the followings unread

Very good.

And now you know why my interest shifted to the STM32 series of CPUs.

ASM might indeed be one way to optimize a bit more and get back the clocks you need for everything to be happy. It happened to me with Karplus-Strong where it went from 4 voices to 6, then to 8 and finally to 12 voices - including chorus.

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VA1



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Posts: 98
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PostPosted: Thu Aug 30, 2018 7:06 am    Post subject: Reply with quote  Mark this post and the followings unread

In worse case like now i can try tune the oscillator up a bit, very funny.

The problem i could remove with the 36dB filter.
Only the 24dB dont sound as nice.

I did lower the delaybuffer to 512 so i have some RAM left to place some tables from ROM to RAM, it did not help enough.
Lowering size now also interpolates to the max ( 15 bit ) very good.

I like to know what is the most common ASM improvement ?
Maybe with some common stuff it will work without tuning the clock.
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JovianPyx



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PostPosted: Thu Aug 30, 2018 7:48 am    Post subject: Reply with quote  Mark this post and the followings unread

That's a really tough question.

It really depends on how bad or good the C compiler optimization is.

Sometimes it helps by using an ASM binary "trick" that doesn't happen in C. Sometimes it's more efficient use of registers. Sometimes an algorithm lends itself more to ASM. The compiler can be rather blind to what you are trying to accomplish. It can be helpful to look at the C compiler's disassembly output to see how it's putting your C into machine language. Sometimes you can spot inefficiencies there. There are also things one can do with bytes where a single 16 bit register is used with two 8 bit numbers in it where the operation is (for example OR) and both numbers are updated in one clock instead of doiing that separately for each byte. There is also the use of DSP instructions such as the MAC (which is useful in both IIR and FIR filters). If documentation doesn't verify it's automatic use of DSP instructions or provide a way to force that in optimization, then you can gain clocks by using them. Sometimes there's a way to use DSP instructions to do things that aren't particularly related to DSP but might be more efficient, such as using MAC to gain access to the 40 bit accumulator instead of doing that by using 2 registers or 2 memory locations. There really is a plethora of ways that ASM can be used to make a program more efficient, use less memory or just be faster.

Also make sure you are using DMA to your advantage. The DMA controllers are like pico-processors that can do things without the CPU and their activity doesn't stop or stall the CPU. An example of this is that in one synth I wrote, I needed noise. Normally, I'd make an LFSR to generate pseudorandom numbers. There is a CRC device in the dsPIC which when used with all zeroes as input data can generate pseudorandom numbers with a hardware LFSR using DMA. You tell it to "go" with one instruction, it takes a few cycles and then the number is available. You can either cause the program to wait until it's done - or better you can have the program do other needed things while the random numbers are being generated.

There is no all-in-one-works-everywhere answer to this. So the answer is "it depends on what the program needs to do".

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VA1



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PostPosted: Thu Aug 30, 2018 7:54 am    Post subject: Reply with quote  Mark this post and the followings unread

Nice trick to generate noise with the DMA.
I dont use DMA at all, can it only make random numbers ?, or can it process some DSP code also ?
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PostPosted: Thu Aug 30, 2018 8:22 am    Post subject: Reply with quote  Mark this post and the followings unread

DMA is mostly used for managing IO from IO devices. Some examples are using an SPI channel to access an SPI SRAM. Data can be both written and read using DMA so that while the serial transfer is happening, the CPU can be busy with other tasks. I used 4 analog pins to receive analog signals (from pots). DMA was used to collect the data from the ADC. Again, while that is happening, the CPU can be doing other things. Most of the IO devices can be controlled using DMA. Using DMA usually results in a faster system because there is parallel activity. Rarely it actually takes more clocks than if you did it yourself, so it pays to calculate the clocks the process will take both ways.

Since mine are MIDI synths, another "trick" I use is to eliminate the UART interrupt. Since MIDI is at 31250 baud, that's no more than 3125 bytes (or interrupts) per second. Interrupts require a stack operation, transfer of control, and then when the ISR is finished, return unstacking. Since my DAC is running at an audio friendly rate, it is running much more often than the UART needs to be serviced. So at the start of the DAC ISR, I first stuff the DAC register and then poll the UART once. If the UART has a byte ready, I get and store the byte and set a "MIDI_byte_available" flag and sense the flag in the MIDI controller loop which is not in the DAC ISR. This prevents the clock wasting that happens in the UART ISR and the DAC ISR can operate without worrying about a UART interrupt randomly occuring during the DAC ISR.

Some of this comes down to working with how the CPU was designed to operate and trying to take advantage of it's paradigm.

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FPGA, dsPIC and Fatman Synth Stuff

Time flies like a banana.
Fruit flies when you're having fun.
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VA1



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PostPosted: Thu Aug 30, 2018 8:39 am    Post subject: Reply with quote  Mark this post and the followings unread

I heard with DSPIC you can not have DMA for MIDI since its not always 3 bytes,
that the DSPIC only has a fixed byte number in the UART and the PIC32 can do better or something.
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JovianPyx



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PostPosted: Thu Aug 30, 2018 8:52 am    Post subject: Reply with quote  Mark this post and the followings unread

It isn't that MIDI can't work wiith DMA, any serial data can work with DMA. It's just that it can't deal with groups of bytes where the number of bytes per transfer varies randomly. It must be set up to work with a single byte at a time for MIDI. That is really no more efficient than using an ISR or the method I described. A similar situation exists with DMA and the DAC. You can set up the DAC and DMA to work with groups of say 8 samples. The samples in DMA RAM are automatically fed to the DAC as they are needed and the DMA controller interrupts when it needs another 8 samples. I don't do this because it causes a latency that can be as much as 8 sample times. I prefer to process each stereo sample one at a time instead of in groups, so for me DMA for the DAC makes no sense.

All of the PICs with DMA use similar controllers. One of the things that is done to set up the controller is to feed a number into a register that determines how many operations to perform. So in fact, PIC32 can't do it any better than the dsPIC and for the same reason. The PIC32 cannot guess how many bytes it needs to collect and neither can the dsPIC. To do so would require a hardware MIDI controller embedded in the PIC and to the best of my knowledge that doesn't exist.

EDIT ADD: I have used a second (or third) dsPIC to do MIDI controller activity. Once a full MIDI message is obtained, the MIDI controller sends the message as a 4 byte packet over SPI to the voice engine dsPIC. This unloads the task of MIDI controller from the voice engine and because each message is always a full message and always the same size, SPI can be sent by the MIDI controller using DMA and the voice engine can receive the MIDI message with DMA. Here again, the messages coming in over SPI can't happen much faster than about 1000 per second, so the SPI DMA controller doesn't need to interrupt, rather, it can be polled in the DAC ISR to conserve stacking clocks caused by interrupts.

Use DMA where it makes sense to do so and avoid DMA where it actually requires more CPU clocks or where it contradicts your design's paradigm.

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FPGA, dsPIC and Fatman Synth Stuff

Time flies like a banana.
Fruit flies when you're having fun.
BTW, Do these genes make my ass look fat?
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