FPGA Sine Synth

[JovianPyx]

I finished this stalled project, a 32 sine wave oscillator MIDI monosynth.

The sample rate is 250 KHz to accomodate very high frequencies (up to 125 KHz).

Each oscillator has what I would call a noise LFO modulating it's amplitude. There are also controls for oscillator level and noise LFO level.

I designed this synth for drones.

The attached MP3 sample uses only 16 of the 32 oscillators. The oscillators are set in frequency as prime number harmonics from 1 to 47.

The second MP3 uses 32 oscillators, harmonics 1 through 32 with main levels set like sawtooth (and would be without the noise modulation).

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sine_synth_001.mp3
Description:	Sample of a single keypress using 16 of the 32 available oscillators.	Download (listen)
Filename:	sine_synth_001.mp3
Filesize:	2.86 MB
Downloaded:	2312 Time(s)

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sine_synth_002.mp3
Description:	Uses 32 oscillators, harmonics 1 through 32 with main levels set like sawtooth (and would be without the noise modulation).	Download (listen)
Filename:	sine_synth_002.mp3
Filesize:	3.02 MB
Downloaded:	2056 Time(s)

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[cloudscapes]

This sounds absolutelly wonderful!
good to see someone else who's big on drones
I'm assuming the noise LFO is what makes each oscillator shift between each-other in the sample

I've been planning a synth last few weeks (long term project). so far just using multiple AVRs as wave sources (maybe 2 each). FPGAs are too daunting for me at the moment.

your project and samples have inspired me to make some adjustments to a few things. specifically emphasizing the noise/random aspect

[JovianPyx]

Yes, the noise LFO is causing the random fade in and fade out of individual oscillators you hear.

To be more specific, the "noise LFO" isn't an LFO at all, rather it is noise that has been filtered so that only very low frequencies are presented for modulating the oscillators. I call it a "noise LFO" because it does things that an LFO would do, but it is not at all cyclic. Technically, since it's LFSR noise, it does repeat, but with a 64 bit shift register clocked at 50 MHz, you'll have to wait a very long time to catch a repeat - I calculate more than 11,000 years.

[monokinetic]

I have been through some of Jovian/Scott's demos here and am most impressed! These two especially are right up my alley....

I was wondering if this synth is running on the AVnet board? Because I think I'm about to bite the FPGA bullet

David

[JovianPyx]

Thanks David,

I've only tried this on a Spartan-3E starter kit which has a slightly larger FPGA. In that FPGA, the design occupies only 49% of available slices, so it would seem possible to fit it into the 400K gate part on the Avnet board. There are some board peripherals (rotary encoder used for fine tuning) that would need redesigning to use a "soft front panel" or additional hardware to be connected to the Avnet board. The Avnet board has no DAC, so that would need to be added and coded as well (but that's true for most synthesizer design's you'd try to put in it).

I would say that it could be made to work.

[monokinetic]

Ok thanks for the info. I'm going to download the Xlinix tools this weekend and see if I can get my head round those before ordering an AVnet board