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One chip Clock Gen with PWM
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bugbrand



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PostPosted: Sat Sep 01, 2007 7:11 am    Post subject: One chip Clock Gen with PWM
Subject description: Circuit for use with Klee!
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Here's a simple little circuit I cobbled together for use with the Klee (though its use goes well beyond this).

I've been a total magpie on this! Its a meeting of Ray Wilson's Soundlab LFO and the PWM from Thomas Henry's VCO1

You begin with a triangle wave (would be nice to make this VC but not too much worry..) and simply comparatorise it. I added on a diode and resistor combo on the output to make sure you're getting positive going pulses -- I've been running this on +-12v and have been getting slightly under 10v pulses.

Notes:
- I haven't specified the values of C1/C2 because I haven't tested this in a system yet -- I'll check these by experimentation -- for the Klee I'm definitely interested in checking the audio rate clocking possibilities.

- as stated, I ran this off +-12v just fine. May need a little tweaking at 15v but quite possibly not.. You may have to adjust the D1 / R10 arrangement a bit if you require more precise or particular gate signals.

- for my Klee I'm actually going to be doing this without the PWM CV input (no space on the panel, so just the manual width control) and may tweak the value of R9 down a little bit so that you can never get a fully OFF or fully ON pulse train.

- one chip!


OneChipClockPWM__Schematic_v1.jpg
 Description:
One chip Clock Generator with PulseWidthModulation
 Filesize:  97.82 KB
 Viewed:  660 Time(s)
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OneChipClockPWM__Schematic_v1.jpg



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goodrevdoc



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PostPosted: Sat Sep 01, 2007 3:04 pm    Post subject: Reply with quote  Mark this post and the followings unread

Very cool circuit bugs. Simple, small, and not too much to add to an already full front panel. Keep us posted about your C1 & C2 findings. This is perhaps exactly what I was looking for.
-justin
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goldenechos



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PostPosted: Sat Sep 01, 2007 5:46 pm    Post subject: Reply with quote  Mark this post and the followings unread

Hey Bugs, just wondering what are the advantages of this op-amp solution over a clock and PWM with a hex schmitt trigger?

TR
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bugbrand



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PostPosted: Sun Sep 02, 2007 4:00 am    Post subject: Reply with quote  Mark this post and the followings unread

Yo, happy to be able to share!


Golden - I did first of all try ideas with the 40106 but... well, just using the 40106 didn't give great results and you don't get the PWM input. The comparator method gives good stability.

Before using the LFO schem I did actually try using the tri-wave from a 40106 osc (you have to buffer straight from the junction of the cap, resistor, gate input) but that wave wasn't ideal - needed amplifying and level shifting. The LFO tri-wave, on the other hand, is a perfect level!

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goldenechos



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PostPosted: Sun Sep 02, 2007 5:26 am    Post subject: Reply with quote  Mark this post and the followings unread

Here is something that might work using CMOS schmitt trigger gates. I have not tried it yet, will do when I have time.

Until soon Bugs,

TR


PWMLFO.tif
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not tested

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 Filename:  PWMLFO.tif
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bugbrand



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PostPosted: Fri Sep 14, 2007 1:51 am    Post subject: Reply with quote  Mark this post and the followings unread

Just coming back to this...

There's actually some issues.... HoHum...

1) Cap values - I've currently got 4n7 and 47n - 4n7 gets up well into audio range

2) The PW idea maybe isn't so great for clock generation actually - I had a slight DUH moment -> adjusting the width (ie raising the comparator level) shifts the relative position of the pulse -- oops, so while you'll keep the tempo constant you'll shift the beat a bit --- that is not so good!

3) I also had problems with this at low rates (it added some confusion to Klee investigations) -> at low freqs the pulse wave edges were not good - little glitch/bounce -> caused some double stepping = bad!
So I increased the hysterisis resistor R6 to 470k (from 2M2)

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State Machine
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PostPosted: Fri Sep 14, 2007 9:03 am    Post subject: Reply with quote  Mark this post and the followings unread

Quote:
2) The PW idea maybe isn't so great for clock generation actually - I had a slight DUH moment -> adjusting the width (ie raising the comparator level) shifts the relative position of the pulse -- oops, so while you'll keep the tempo constant you'll shift the beat a bit --- that is not so good!


Yes, what you are doing is pulse position modulation which is really a nice way to add "swing" to a beat so sometimes that really is not that bad after all. You would have to compare agaiinst a ramp waveform for PWM exclusively. I am sure you know that by now but firgured I would make a little noise ... Very Happy

Looking at this fast, you can just add a FET across the integrating capacitor to get ramp voltages by rapidly discharging it. This will raise the frequency so you would have to adjust your timing components. For the output comparetor configuration you currently have, you would probebly need a negative going slope on the ramp :


Hows is going fellow Klee-Meister ??

Bill
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bugbrand



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PostPosted: Fri Sep 14, 2007 4:19 pm    Post subject: Reply with quote  Mark this post and the followings unread

Hey Bill - yeah, the realisation of the fix came to me this afternoon too - though I haven't tried it out yet... Yeah, ramp down should be perfect -- & I think you only need to add a diode to reset (done similar with LFOs based on similar core design) (maybe a small value resistor too).

Though, yes, a bit of swing is definitely interesting!
I really must make a Yusynth trigger delay or two..


I'll update the schematic sometime though may not be 'til nearly Oct 'cos I'm heading off for a bit on Monday.. Taking me away from the Klee too -- aaaah, quite frustrating! It demands play!

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State Machine
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PostPosted: Fri Sep 14, 2007 6:41 pm    Post subject: Reply with quote  Mark this post and the followings unread

Quote:
& I think you only need to add a diode to reset (done similar with LFOs based on similar core design) (maybe a small value resistor too).


Yes sir. Nice. The diode is cheaper also Very Happy Very Happy Nice circuit, and one inexpensive chip !! Good work so far man ! Just a bit of tweaking thats all Very Happy

Bill
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State Machine
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PostPosted: Fri Sep 14, 2007 6:43 pm    Post subject: Reply with quote  Mark this post and the followings unread

Quote:
Here is something that might work using CMOS schmitt trigger gates. I have not tried it yet, will do when I have time.


Try a JPEG image ... The forum does not support TIFF format ... Very Happy

Thanks for posting !!

Bill
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elektro80
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PostPosted: Fri Sep 14, 2007 6:48 pm    Post subject: Reply with quote  Mark this post and the followings unread

Schematics and stuff like that will generally be less sharp and crisp in jpeg format. PNG is cooler.
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elektro80
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PostPosted: Fri Sep 14, 2007 6:49 pm    Post subject: Reply with quote  Mark this post and the followings unread

Uh.. that tiff file.. works fine for me. Excellent!
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blue hell
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PostPosted: Sat Sep 15, 2007 3:00 am    Post subject: Reply with quote  Mark this post and the followings unread

Mozilla doesn't know how to handle tif extensions here and it just shows the alt text. Here it is as a PNG.


pwmlfo.png
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 Filesize:  3.37 KB
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pwmlfo.png



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also .. could someone please turn down the thermostat a bit.
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State Machine
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PostPosted: Sat Sep 15, 2007 6:49 am    Post subject: Reply with quote  Mark this post and the followings unread

Quote:
Schematics and stuff like that will generally be less sharp and crisp in jpeg format. PNG is cooler.



I will take that advice. Thanks. Hmmm, when I send PM's with TIFF attachments, folks usually do not see them. I know bitmaps are the best quality BUT take the most storage. I will try the PNG format for now on ... Very Happy Very Happy

Bill
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PostPosted: Sat Sep 15, 2007 6:50 am    Post subject: Reply with quote  Mark this post and the followings unread

Quote:
Mozilla doesn't know how to handle tif extensions here and it just shows the alt text. Here it is as a PNG.


That image is very sharp, good quality ...

Bill
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goldenechos



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PostPosted: Sat Sep 15, 2007 10:37 am    Post subject: Reply with quote  Mark this post and the followings unread

I apologize everybody, I will use .PNG format from here on out.

Thanx for reformatting Blue Hell. Anybody had time to try it out? I sure have not! I am in the middle of refurbishing my bathroom!

Tony
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fonik



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PostPosted: Wed Feb 03, 2010 1:41 pm    Post subject: Reply with quote  Mark this post and the followings unread

i thought it would be good to resurrect this old thread, since tonight i built another one chip clock module with PWM for the klee2. i still have it on a breadboard, so no pix or samples right now. but it's tested and works quite nice IMHO.

it provides a speed control & VC speed, a pulse width control & VC pulse width. the resistor values are for 15V operation and 5Vp-p control voltages. for 12V operation it would require some changes.

it is based on the EFM bassace VCO, thus providing a falling ramp. this is good for not getting out of tempo when doing PWM with a comparator (see previous posts above).

i simplified the circuit. it is not 1V/oct or temperature stabilized anymore. i thought this would not be necessary for a clock module. however it is working in a wide range, even audio.

the VCO uses 2/4 of a quad opamp, and 1/4 for the comparator creating the pulse. i used the left opamp for an attenuverter on the PWM input.

EDIT: the saw from the VCO core has to be 0-5V to match the resistor values of the PWM circuitry. so you may have to add an attenuverter between IC's pin1 and R12. i found out that while the TL074 i used on the breadboard put out just those 0-5V, the TL074 i used on the PCB put out 0-12V...

Posted Image, might have been reduced in size. Click Image to view fullscreen.

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Last edited by fonik on Sun Apr 25, 2010 1:46 pm; edited 1 time in total
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fonik



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PostPosted: Mon Mar 22, 2010 4:12 pm    Post subject: Reply with quote  Mark this post and the followings unread

the TH version proto PCB is in. however, i will not have the time to stuff the board this week.
anyways, here are two short samples of my SMD version, clocking the VCPS8 and then the klee2. the first measures are without PWM, then the PWN comes in. listen to the difference, and notice that the timing is not affected by the PWM.

VC Clock 01 by fonitronik

VC Clock 02 by fonitronik

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befacosynth



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PostPosted: Tue Oct 19, 2010 6:04 pm    Post subject: Reply with quote  Mark this post and the followings unread

Do you have the layout or the eagle ".brd" of this ?
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fonik



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PostPosted: Tue Oct 19, 2010 10:40 pm    Post subject: Reply with quote  Mark this post and the followings unread

befacosynth wrote:
Do you have the layout or the eagle ".brd" of this ?

sure. and i will offer a PCB this year. i just have to populate and test the proto PCB...

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ATOM



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PostPosted: Tue Oct 19, 2010 10:58 pm    Post subject: Reply with quote  Mark this post and the followings unread

fonik wrote:

i will offer a PCB this year. i just have to populate and test the proto PCB...

Very Happy
ATOM
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befacosynth



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PostPosted: Wed Oct 20, 2010 1:12 am    Post subject: Reply with quote  Mark this post and the followings unread

nice!
But Iḿ building my klee Now. I think I'll have to mess with perfo board : )

For this will be a good idea to add the A-B/ B-A mod and maybe another mods for the klee in the same pcb to make the ultimate Upgrade pcb.

Thaks anyway!!

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