MN3205 Delay experiments

[Uncle Krunkus]

First, I'll try posting the schem again,
More to follow,

This schem doesn't work! New one posted further down the thread!!

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[Uncle Krunkus]

Okay, that worked,

The problem is that I can't get anything coming out of the BBD except clock noise.
I've got about 150-200mV of signal going into pin 7.
Good clocks @ about 20Khz

Should I drop the clock and BBD supply to 6V instead of 9V?

[diablojoy]

freq of test signal ? have you tried slowly ramping up the freq to see if all freq are affected
what level are clock pulses at ? may be higher than really necessary
dropping the clock supply to 6v may help or trim on clock output
what is the shape of the clock pulse like ? may need more smoothing, ?
just on a quick look you do seem to have an awfull lot of capacitors
in the effected signal path presumably to filter out the clock. haven't tried to do the math on those and not sure if i could, but you may be losing a too much of your signal to ground
what are you getting at VR2/2 ?
ok edit just looked at data sheet for mn3102 drop your vdd to 5 volts
which should help a lot , thats what its expecting not 9v
this should lower the clock pulse peaks and allow the internal shaping in the chip to function correctly.
try that and let me know how it goes.
cheers
Denis.

[Uncle Krunkus]

Hey!
I have echos!
It was mostly two things, the supply, I've dropped it down to 5V5 for the clock and BBD chips,
And,.... the BBD output arrangement.
As soon as I dropped the supply, I started getting an output from the BBD, but I couldn't hear it until I fixed the output bias.
I pretty much copied the DimC schem, including shifting the bias to the other side of C42 (R67/69).
Suddenly I have echos! Fairly nasty distorted echos, but echos none the less.
I'm thinking now I should have copied the DimC schem from the start.
I only fried one BBD in the process. I think that was when I tried the suppy (9V) the opposite way around! (roll!!) LOL!! I've still got 3 left, so that should make a reverb.
Now I just need to look at why it's so distorted.
I think that will be fixed when I implement more of the DimC ideas.
Thanks for the encouragement Denis.

[Uncle Krunkus]

I'll have a new schem up here this arvo.

[Uncle Krunkus]

Okay,
Although it's a bit distorted, this schem works, and I'm quite excited about it working!!
Tonight I want to start tracing a square wave input through from the front end and find out where the distortion is happening.
Then I'll be adding the DimC clock modulation.

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[diablojoy]

great to hear you have an output now

[StephenGiles]

Is the signal distorted immediately before and immediately after the BBD? If so then it could be just a level problem. Otherwise it could be a biasing problem, normally adjusting the bias trimmer takes the BBD output from nothing to distorted to clear to distorted and back to nothing again. If you are not getting that sequence, you might try different value trimmer pots.

[Uncle Krunkus]

No, I'm pretty sure the distortion is happening before it gets to the BBD.
Half of this circuit is still the way it was setup for the MN3005 which runs a lot hotter. I think it's got to do with that.
I'm thinking I might convert it all to the DimC approach, and then decide on whether the feedback still goes the same way. (the DimC, of course, has no feedback)
I could also try the feedback arrangement from the saphire flanger which uses an MN3207 like the DimC. (but doesn't have a compander! )

Either way,.... I have Forbidden Planet type echos and spaceship noises in the lab, so things should get better and better from here on in. You gotta be happy with that.

[Uncle Krunkus]

Scrub that last post Stephen,
It was mostly the input bias on the BBD.
I changed it up to a 100K like the DimC, gave it a tweak, and the distortion is heaps better. I think it's still running a bit hot, cos with just a bass guitar on the input, the sweet spot is very narrow, almost not there.

[Scott Stites]

Cool beans, Krunkus old man.

Just to be sure (and I doubt you've done it, since you only have one compandor IC in there), but the original Dim C schematic, which uses two NE570s, had an unused section on the compressor IC. The Dim C schematic shows Pins 9 and 10 tied together on the unused section, and the circuit will not work if those pins are tied together - huge distortion and general mayhem. Pin 9 or Pin 8 should float if there's an unused section of an NE570.

But, like I say, probably not the case, because you're only using one, so there would be no unused section.

Cheerios,
Scot

[Uncle Krunkus]

Hey Scott,
No I've been aware of the ol' tie pin 9 to 10 shinanigans that goes on with that schem of the DimC for quite a while now. A very wise old DIYer told me about it years ago and I never forgot!
I'm only using the one NE570 at this stage, and I gotta say it's sounding quite good.
I'm thinking though of shifting everything towards the DimC design, and adding the feedback once that's sorted.
A couple of questions,
1> Will it be easier to incorporate a signal summer near the input (to choose original in and/or delay from other modules) if I change to the two op-amps at the front like the DimC?
2> Why does the feedback on the DM2 schem go into the compander at pin 5 rather than pin 6, I know it's the inverted input, but being purely delayed signal, there is little chance of uncontrolled feedback no?
Better go,
"It's my birthday and I'll breadboard if I want to,
breadboard if I want to,
breadboard if I want to.
You'd breadboard to if it (43) happened to you!!!"

[StephenGiles]

[Uncle Krunkus]

[Uncle Krunkus]

Here's the schem for the basic delay module. I'm thinking I'll build three of these and then modulate them and interconnect them separately. I still want to breadboard this again to check that the levels are fairly closely matched.
Does anyone have any ideas, critiques?

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[loss1234]

hell i have been trying with NO success to get my mn3207 experiments working this week


(i never could have imagined how HARD BBD work is!! i ended up hurting my ears REALLY badly on the high freq clock without KNOWING i was even hearing it at insanely high levels...)


maybe i will try out your mn3205 schematic

thanks for this

[Uncle Krunkus]

It should work fine for the XX3207 as it's partly inspired by the DimC schematic. Keep in mind though that the pinouts for the MN3205 and the MN3207 are very different. Check the datasheet, and check it again!
Yeah, I had quite a time getting this happening, partly because the example on the MN3205 datasheet has the power rails reversed!
I have come a long way though. Now I just need a bit of alone time to do the stripboard! This idea might be finished by the 30th of Feb!!

[loss1234]

HMMM

i tried building your scheamatic WITH the mn3205

no luck.

so

1. what should i being seeing on the SCOPE at the outputs of the MN3102 pins
2 and 4?

2. what should i be seeing at the input of mn3102 pin 5?

(i have a feeling my clock might not be working as if it was, clock bleed would be an issue and i hear nothing.


i wish there was a simple TEST circuit for the mn3102!

but knowing what i should see should help

thanks so much

[ickystay]

Thanks very much for taking this on!

The key seems to be the VC on the clock. If that's a go, couldn't it be applied to any 3102/32XX circuit?

A simple addition might be the "Tape Quality" pot as on the DOD FX96:

http://www.schematicheaven.com/effects/dodfx96_echo.pdf

[Uncle Krunkus]

It's actually the VC clock which is the part I wanted to check, so maybe you've found an error which I hadn't seen yet. (that's partly why I wanted to share it, so I could get some others interested in understanding how it might work (or not)!!)
The clock lines should both have a sqaure wave of almost 6V around 30-80khz depending on the speed.

The "tape quality" pot is really just a low pass filter to take the top end off the delay. I'd rather develope this circuit to give the best response first, then if you want to take off the top end, you could put it through a filter later.
The complete unit is gonna have enough controls already, so I don't want to add anything which can be done elsewhere.

[loss1234]

krunkus...which clock circuit should i use then that you know works?

(does the one in the topmost schematic work?)

this seems to be the issue with BBD's is that without a good clock you have nothing.

i just hope i didnt fry my chips

thanks

[Uncle Krunkus]

No, you won't have fried your chips.
The only part of the VC clock I haven't checked is the summing node. Everything left of the 5K6 resistor is tested and works fine.
You do have a cap connected at the "delay range" point to ground? Without that, the clock will be dead.

[loss1234]

yes i connected everything from your schematic.

these chips are old though, bought them 2 or 3 yrs ago.

is there a SIMPLE way to test one?

(When i looked at the scope PIN 4 was hitting 5v and pin 2 was at ground.

[Uncle Krunkus]

Yeah,
100pF between 5 & 7
100K between 6 & 7

[loss1234]

well, after working with a bunch of schematics, i finally got an MN3207 project to work.

your schematic helped but right now i just wanted something siimple to make sure everything worked.

however i wanted to try the 4046 clock so i wouldnt need any special chips.

also..the 4046 may allow for easy CV control if an offset is added to pin 9.

of course...for it to work with LINE levels, I need to do some major work to the front and back end.

maybe use the 571?

thanks so much!

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