Softpot Ribbon Controller

[Scott Stites]

My initial Rube Goldberg......

Polarities would have to be sorted - this debounces gates and triggers without reliance on an RC time constant while keeping as a top priority detecting a low comparator state in order to hold the S&H clock ASAP and only once.

This thing makes the synth sound so good (and is so much fun) on the breadboard, I feel especially inspired.

Edit - Whoops, had pulse detector out feeding the D input rather than comparator out.

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[Scott Stites]

Condition: Ribbon controller first pressed by human appendage.

1. Comparator goes high - it may bounce a little on the way up.

2. Edge detector produces a pulse from the rising edge of comparator out and resets the counter.

3. The counter will attempt to count up to its terminal count, and will be able to do so once the comparator output is stable and does not interrupt the count - this serves to debounce the comparator output.

4. Once the counter reaches terminal count, it inhibits any more counts so that it "rests" at terminal count. The transition to terminal count clocks the first flipflop (the one top right). Terminal count will go low when the next event causes a reset of the counter.

5. Because the comparator is high, the flip flop Q goes high when it is clocked.

6. The Q output of this flipflop will be used to generate a gate and trigger signal - Note On.

7. The gate is high, and the comparator is steady, so the Q output of the flip flop also generates a pulse which resets the second flip flop (lower middle).

8. /Q of the second flip flop goes high on reset, allowing the Sample and Hold to be constantly clocked, thus allowing the output of the S&H to follow the movement of the voltage supplied by the soft pot through the lag circuit.

Condition: Ribbon controller is released by human appendage.

1. Comparator goes low - it may bounce a little on the way down.

2. Edge detector produces a pulse from the falling edge of comparator out and resets the counter while at the same time clocking the /Q output of the second, lower middle flipflop low.

3. The low /Q of the second flipflop immediately causes the S&H to hold its last sampled value from the lagged SoftPot wiper voltage.

4. Just as importantly, the low /Q of the second flipflop prevents any comparator bounce from possibly causing the S&H to sample any other voltage

5. Meanwhile, the counter will attempt to count up to its terminal count, and will be able to do so once the comparator output is stable and does not interrupt the count - this serves to debounce the comparator output.

6. Once the counter reaches terminal count, it inhibits any more counts so that it "rests" at terminal count. The transition to terminal count clocks the first flipflop (the one top right). Terminal count will go low when the next event causes a reset of the counter.

7. Because the comparator is low, the flip flop Q goes low when it is clocked.

8. The Q output of this flipflop will be used to terminate the gate signal - Note Off.

9. The Q of the first flip flop is low, so the Q output of the flip flop does not generate a pulse to reset the second flip flop (lower middle). This prevents the S&H from starting to sample 0V.

Once the ribbon is pressed again, the Q of the first flipflop will go high and reset the second flip flop - until the comparator is high and stable, the second flip flop will not allow any bounce to inadvertently cause the S&H to sample the wrong voltage.


Needs refinement and math, and some of this may end up being unnecessary, but I like to load for bear and change ammo when all I find is bunny wabbits.

Cheerios,
Scott

[State Machine]

Scott, OK cool, I will sort this out tonight. Thanks for posting this. I finally have a weekend off of work so I can concentrate on the things that really count ...

Bill

[State Machine]

OK, I took a look at the circuit and had drawn a timing diagram. Everything seems in order and I see just one critical item that will be of concern to you in the future. It's with ragard to the RESET suppression to the S/H clock enable flip flop (lower middle). When the counter TERMINAL COUNT goes high after timing out on the release of the softpot, there will be a propagation delay (Tp) of the comparator output through the TRIG/GATE FF which will cause the AND gate to output a pulse (Tp) wide. A glitch. This MAY cause another reset to the clock enable FF and re-enable the S/H clock a short time after release thus causing the CV to output a constant 0 volts. It seems like your breadboard is working and thats a good sign.

Now, I do see in the diagram you have a cap on the output of the AND gate in series with the FF's RESET terminal which may indicate that you know about this potential hazard already and may make this observation moot.

[State Machine]

[fonik]

obviously here is something very interesting coming again. scott ahead of the crowd...
what actually is this >soft pot< you're talking about. is it a ready made product? i missed that somehow.

[Scott Stites]

Hey Fonik,

SoftPot is a product made by a company called "SpectraSymbol". I've known about it for a few years now, but could never find it for sale anywhere. I've heard one can get samples from the company, but I never tried.

Finally, I ran across it at SparkFun:

http://www.sparkfun.com/commerce/advanced_search_result.php?keywords=softpot&search_section=products

It's not too cheap, (though it will be not too bad considering the Euro exchange rate) but I couldn't help myself and got a 500 mm strip and two 200 mm strips. I've been dying for this stuff for a long time..

Cheerios,
Scott

[jnuaury]

[quote="fonik"]
what actually is this >soft pot< you're talking about. is it a ready made product? /quote]

here is the company website
http://spectrasymbol.com/typo3/site/en/softpotsplash.html

and here is one of the only places ive found to purchase them online
http://www.sparkfun.com/commerce/advanced_search_result.php?keywords=softpot&x=0&y=0&search_section=products


please note that the spectrasymbol will send you free samples!!!!

the softpot is a "membrane potentiometer"
they are very fun to use and easy to work with

last time i used them was for a controller for software where the triggering and gate issues are easy to handle
you can designate different portions of the softpot to do different tasks easyily with software... but im very interested in the hardware solutions to gates/triggering possibilites

[Scott Stites]

The term "bread board friendly" clinched the deal for me.

My lab assistant, Igor, had a blast driving my synth batty with it last night.

[jnuaury]

Scott, you are one speedy dude.

[Scott Stites]

As you are speedy as well.

Funny you should mention switching and stuff - I was thinking last night about a string of window comparators (heck maybe even a 3914) that could be used along the length - neato multiple drum pad, I suppose.

[fonik]

[State Machine]

Running one of these through a quantizer would be fun also A quantizer that could handle many various types of musical scales would be interesting. Run your "appendage" across the softpot and play incredible solos !!

Many possibilities !

Bill

[Scott Stites]

Well, the Rube Goldberg diagram is out. It really was too much dynamite in the wrong places. Debouncing the trigger/gate/S&H comparator was a much simpler affair than all that rigamarole.

The problem is the bounce. I can't find a good balance between S&H clock and lag to make things either not crappy sounding when the appendage is lifted or predictable when the appendage is lifted, or both.

It needs to grab a sample that occurs before the comparator even thinks of going high and hang onto that when it does go high. I'm thinking of a three element shift register - two fairly simple S&H's feeding a low-lag S&H, all driven from a CD4015. The first two S&Hs would be long enough to bridge any point in the bounce (around a ms), and the third would simply hold what it inherited the last time a valid sample was taken. In the event the comparator goes high while the main S&H was taking a sample, things could wait until it was done - it would still be a valid sample that occurred a ms or so before the comparator went high.

I think this actually would be a less complicated affair than that suitable-for-framing Goldberg model, and wouldn't require a lag circuit.

Cheerios,
Scott

[frijitz]

[doctorvague]

[State Machine]

Scott,

I have a TDS2024 storage scope here in my shop. I also have a 4" Spectra Symbol softpot. If you like, I can capture the pots wiper while pressing it multiple times to get worse case bounce for both press and release conditions. This will quantify exactly what your dealing with so you can refine your design. I can do this while you decide on a circuit topology.

I will most likely do this anyway for my own curiosity but will share this data on this thread. This may be of interest to those who may want to approach the problem differently.

There could be so many ways to skin this cat

Bill

[State Machine]

[doctorvague]

[frijitz]

OK, here's a slightly more evolved idea.

Main chain as above.

Side chain:

(a) Comparator. Input signal above threshold near pullup value (finger up).

(b) Positive differentiator. Pulses at + edges.

(c) One shot. Long enough to span all bouncing.

(d) OR gate. (a) OR (c)

(e) FET gate. Sampling cap holds lagged signal from as soon as finger comes up until after finger down.

I hope I got this right (and said it right, too). The side chain can respond very fast. With the second order lag filter you wouldn't need too long of a lag time.

You didn't mention this, but if it was me I'd think about putting (b) before (a) to get sampling and a trigger signal when the slider was "hammered on" as well as when the finger is lifted. In this case the differentiator would be bipolar and the threshold set so it doesn't fire when sliding. This might require some careful adjustment.



Ian

[frijitz]

[Scott Stites]

Dr. V: I caught that one, didn't need an emoticon. Sort of like a complete loop....

Ian: Thanks for those suggestions. Reason I'm using a clock is I'd never thought of the differentiator idea, though TH did mention something along the lines of Bernie's one bus keyboard. In the absence of this approach, the clock was a means to hopefully sample the voltage before it does funny things on its way to rendering a comparator pulse.

Bill: Yez got SoftPot? Do you by any chance have a 500 mm strip? I think the bounce properties will vary with length. Storage scope would be nice. Had one long while back, but it bought the farm.

Things are progressing nicely with my approach. I've started the ASR idea, using a 4017 as a three phase pulse generator. The clock itself, BTW, is gated by the comparator voltage (it shuts down when comparator is low). Anyway, I've got the CD4017 set up to provide the pulses with a CD40106 narrowing the pulses for the S&H elements. I put on the first S&H to test it and found that (with a third of the frequency I was last using this morning, 3:00 AM) the samples have settled down considerably already. It's already dang close to usable; there's still a bit of occasional ambiguity in the sample timing that the rest of the idea should clean up nicely.

I'm having a blast here.

Cheerios,
Scott

[State Machine]

[Scott Stites]

ASR idea works like gangbusters so far. I'm diggin' it....

[State Machine]